分析与比较:亚微米技术中的全加法器块

2013 Fifth International Conference on Computational Intelligence, Modelling and Simulation Pub Date : 2013-09-24 DOI:10.1109/CIMSIM.2013.39

A. Grover

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引用次数: 69

摘要

工作电压的降低对提高集成电路的性能起着重要的作用。除了更低的功耗，晶体管的面积和尺寸的减小也是设计标准和制造系统的重要因素。本文通过比较不同类型的加法器电路来提高系统的性能。本文采用TG技术设计了一种新的电路。基于平均功耗和时延等不同参数，观察到进位前置加法器和进位旁路加法器的功耗更高。利用TANNER工具对基于TG的8位不同AdderDesigns采用180nm技术进行了比较分析。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Analysis and Comparison: Full Adder Block in Submicron Technology

The reduction in the operating voltage play a majorrole in improving the performance of the integratedcircuits.Apart from that lesser power consumption, reducedarea and smaller size of transistors are also the vital factors inthe design criteria and fabrication of the systems. This articleapproaches towards the increasing performance of the systemsby comparing different types of adder circuits. In this article, anew circuit has been designed using the TG technology. Basedon different parameters like average power consumption anddelay, it has been observed that the Carry look-ahead adderand Carry bypass adder consumes more power. TheComparative analysis of TG based 8-bit different AdderDesigns using 180nm technology using TANNER tool has beenconsidered.

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来源期刊

2013 Fifth International Conference on Computational Intelligence, Modelling and Simulation

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