Chao Wang, S. Maier, Xiaoning Nie, Xuehai Zhou, J. Ji
{"title":"基于ADL的精确多处理模拟器","authors":"Chao Wang, S. Maier, Xiaoning Nie, Xuehai Zhou, J. Ji","doi":"10.1109/SEC.2008.51","DOIUrl":null,"url":null,"abstract":"Simulator plays a vital role in multiprocessor studies and multi-core designs. Since it is hard to obtain a stable, fast and accurate simulator in time, it poses a significant challenge especially for multi-core application specific instruction-set processors (ASIP). Presently Architecture Description Languages (ADL) is widely used to aid the design of ASIP, benefiting from automatic generation of the software tool chain. This paper identifies and describes a concept of multi-processing simulator and its implementation Lsimpp. The concept combines the ADL-based automation, the timing accurate System-C module extensions and the flexible C++ module library into a sound framework for a multi-processing simulator. The resulting Lsimpp is an extensible simulator which includes a state-of-the-art ASIP multi-core processor model, standard buses, arbiter and memories. In processor models, all the pipeline resources and operations are described in ADL. Based on the automatically generated core models, extensions have been applied to include the standard OCP TL 2 bus. A verification concept is developed to embed the single core test cases for regression tests of the simulator. Empirical experiment results on sample applications demonstrated that the simulator runs correctly with great accuracy and satisfactory performance.","PeriodicalId":231129,"journal":{"name":"2008 Fifth IEEE International Symposium on Embedded Computing","volume":"207 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2008-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"An Accurate Multi-processing Simulator Based on ADL\",\"authors\":\"Chao Wang, S. Maier, Xiaoning Nie, Xuehai Zhou, J. Ji\",\"doi\":\"10.1109/SEC.2008.51\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Simulator plays a vital role in multiprocessor studies and multi-core designs. Since it is hard to obtain a stable, fast and accurate simulator in time, it poses a significant challenge especially for multi-core application specific instruction-set processors (ASIP). Presently Architecture Description Languages (ADL) is widely used to aid the design of ASIP, benefiting from automatic generation of the software tool chain. This paper identifies and describes a concept of multi-processing simulator and its implementation Lsimpp. The concept combines the ADL-based automation, the timing accurate System-C module extensions and the flexible C++ module library into a sound framework for a multi-processing simulator. The resulting Lsimpp is an extensible simulator which includes a state-of-the-art ASIP multi-core processor model, standard buses, arbiter and memories. In processor models, all the pipeline resources and operations are described in ADL. Based on the automatically generated core models, extensions have been applied to include the standard OCP TL 2 bus. A verification concept is developed to embed the single core test cases for regression tests of the simulator. Empirical experiment results on sample applications demonstrated that the simulator runs correctly with great accuracy and satisfactory performance.\",\"PeriodicalId\":231129,\"journal\":{\"name\":\"2008 Fifth IEEE International Symposium on Embedded Computing\",\"volume\":\"207 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2008-10-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2008 Fifth IEEE International Symposium on Embedded Computing\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SEC.2008.51\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2008 Fifth IEEE International Symposium on Embedded Computing","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SEC.2008.51","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An Accurate Multi-processing Simulator Based on ADL
Simulator plays a vital role in multiprocessor studies and multi-core designs. Since it is hard to obtain a stable, fast and accurate simulator in time, it poses a significant challenge especially for multi-core application specific instruction-set processors (ASIP). Presently Architecture Description Languages (ADL) is widely used to aid the design of ASIP, benefiting from automatic generation of the software tool chain. This paper identifies and describes a concept of multi-processing simulator and its implementation Lsimpp. The concept combines the ADL-based automation, the timing accurate System-C module extensions and the flexible C++ module library into a sound framework for a multi-processing simulator. The resulting Lsimpp is an extensible simulator which includes a state-of-the-art ASIP multi-core processor model, standard buses, arbiter and memories. In processor models, all the pipeline resources and operations are described in ADL. Based on the automatically generated core models, extensions have been applied to include the standard OCP TL 2 bus. A verification concept is developed to embed the single core test cases for regression tests of the simulator. Empirical experiment results on sample applications demonstrated that the simulator runs correctly with great accuracy and satisfactory performance.