{"title":"了解ReRAM器件中的漏洞,以信任半导体设计","authors":"T. Schultz, R. Jha","doi":"10.1109/NAECON.2017.8268798","DOIUrl":null,"url":null,"abstract":"This paper discusses attack vulnerabilities in Resistive Random Access Memory (ReRAM) devices that can be potentially triggered by Trojan circuits. Systematic experiments were performed on Ru/MgO/Ti/W based ReRAM devices in 1R and 1T1R configurations. Our observations indicate that vulnerabilities in ReRAM include destabilization of filament due to current overshoot, local heating, introduction of parasitic capacitances, and glitches in the source voltages. These studies are critical to design more robust ReRAM devices that are immune to hardware attacks.","PeriodicalId":306091,"journal":{"name":"2017 IEEE National Aerospace and Electronics Conference (NAECON)","volume":"19 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Understanding vulnerabilities in ReRAM devices for trust in semiconductor designs\",\"authors\":\"T. Schultz, R. Jha\",\"doi\":\"10.1109/NAECON.2017.8268798\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper discusses attack vulnerabilities in Resistive Random Access Memory (ReRAM) devices that can be potentially triggered by Trojan circuits. Systematic experiments were performed on Ru/MgO/Ti/W based ReRAM devices in 1R and 1T1R configurations. Our observations indicate that vulnerabilities in ReRAM include destabilization of filament due to current overshoot, local heating, introduction of parasitic capacitances, and glitches in the source voltages. These studies are critical to design more robust ReRAM devices that are immune to hardware attacks.\",\"PeriodicalId\":306091,\"journal\":{\"name\":\"2017 IEEE National Aerospace and Electronics Conference (NAECON)\",\"volume\":\"19 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE National Aerospace and Electronics Conference (NAECON)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/NAECON.2017.8268798\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE National Aerospace and Electronics Conference (NAECON)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/NAECON.2017.8268798","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Understanding vulnerabilities in ReRAM devices for trust in semiconductor designs
This paper discusses attack vulnerabilities in Resistive Random Access Memory (ReRAM) devices that can be potentially triggered by Trojan circuits. Systematic experiments were performed on Ru/MgO/Ti/W based ReRAM devices in 1R and 1T1R configurations. Our observations indicate that vulnerabilities in ReRAM include destabilization of filament due to current overshoot, local heating, introduction of parasitic capacitances, and glitches in the source voltages. These studies are critical to design more robust ReRAM devices that are immune to hardware attacks.