绝缘体上硅“栅极全能”MOS器件

J. Colinge, M. Gao, A. Romano, H. Maes, C. Claeys
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引用次数: 59

摘要

MOS器件的总剂量辐射硬度与与硅接触的氧化层厚度的平方成反比。在SOI(绝缘体上硅)器件中,硅层位于通常为400nm的氧化层上。提出在器件的正面和背面都可以实现薄的栅极质量的氧化物,这将大大提高器件的辐射硬度。双栅器件(即在器件的前面和后面有相同的栅极)已被证明至少在理论上具有有趣的短通道和高跨导特性。唯一报道的这种器件的实现使用了复杂的,高度非平面的工艺(垂直器件),并且使器件的一个边缘与厚氧化物接触,这可能对抗辐射性能有害。介绍了器件的制备工艺和性能
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Silicon-on-insulator 'gate-all-around' MOS device
The total-dose radiation hardness of MOS devices is roughly inversely proportional to the square of the thickness of the oxide layers in contact with the silicon. In SOI (silicon-on-insulator) devices, the silicon layer sits on an oxide layer of typically 400 nm. It is proposed that a thin, gate-quality oxide can be realized at the front as well as the back of the devices, which should greatly enhance the radiation hardness. Double-gate devices (i.e. the same gate at the front and the back of the device) have been shown to have, at least theoretically, interesting short-channel and high transconductance properties. The only reported realization of such a device used a complicated, highly non-planar process (vertical devices) and left one edge of the device in contact with a thick oxide, which can be detrimental to rad-hard performances. Fabrication processes and device performances are described.<>
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