基于I/sub DDQ/测试的VLSI电路计算机辅助失效分析

Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium Pub Date : 1993-04-06 DOI:10.1109/VTEST.1993.313300

Samir B. Naik, Wojciech Maly

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引用次数: 15

摘要

最近提出了一种基于真实缺陷建模的集成电路诊断新方法。已经设计出算法来生成“好的”诊断测试集。在本文中，作者证明了CMOS随机逻辑可以获得高水平的诊断分辨率，特别是在监测电路输出电压之外的异常I/sub DDQ/电流测量时

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Computer-aided failure analysis of VLSI circuits using I/sub DDQ/ testing

A new approach to IC diagnosis, based on realistic defect modelling, has been recently proposed. Algorithms have been devised to generate 'good' diagnostic test sets. In this paper, the authors demonstrate that high levels of diagnostic resolution can be obtained for CMOS random logic, especially when abnormal I/sub DDQ/ current measurements are monitored in addition to circuit output voltages.<>

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Digest of Papers Eleventh Annual 1993 IEEE VLSI Test Symposium

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