{"title":"单运放算法转换器及其偏移和失配补偿","authors":"Yao Liu, F. Maloberti","doi":"10.1109/ISSCS.2013.6651258","DOIUrl":null,"url":null,"abstract":"This paper studies features and limits of an algorithmic ADC implemented with a single operational amplifier. Since the technique can be profitable when the resolution reaches more than 12-bit compared with SAR algorithm, it is necessary to ensure proper specification of active and passive elements or to compensate for these limits. It is shown that reconfigurability of the architecture allows measuring offset and capacitor mismatch for a background or a foreground calibration.","PeriodicalId":260263,"journal":{"name":"International Symposium on Signals, Circuits and Systems ISSCS2013","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-07-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Single Op-Amp algorithmic converter and its offset and mismatch compensation\",\"authors\":\"Yao Liu, F. Maloberti\",\"doi\":\"10.1109/ISSCS.2013.6651258\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper studies features and limits of an algorithmic ADC implemented with a single operational amplifier. Since the technique can be profitable when the resolution reaches more than 12-bit compared with SAR algorithm, it is necessary to ensure proper specification of active and passive elements or to compensate for these limits. It is shown that reconfigurability of the architecture allows measuring offset and capacitor mismatch for a background or a foreground calibration.\",\"PeriodicalId\":260263,\"journal\":{\"name\":\"International Symposium on Signals, Circuits and Systems ISSCS2013\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-07-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"International Symposium on Signals, Circuits and Systems ISSCS2013\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCS.2013.6651258\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"International Symposium on Signals, Circuits and Systems ISSCS2013","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCS.2013.6651258","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Single Op-Amp algorithmic converter and its offset and mismatch compensation
This paper studies features and limits of an algorithmic ADC implemented with a single operational amplifier. Since the technique can be profitable when the resolution reaches more than 12-bit compared with SAR algorithm, it is necessary to ensure proper specification of active and passive elements or to compensate for these limits. It is shown that reconfigurability of the architecture allows measuring offset and capacitor mismatch for a background or a foreground calibration.
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