LCA网络的并行处理能力研究

[Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation Pub Date : 1992-10-19 DOI:10.1109/FMPC.1992.234918

I.D. Scherson, P.Y. Wang

{"title":"LCA网络的并行处理能力研究","authors":"I.D. Scherson, P.Y. Wang","doi":"10.1109/FMPC.1992.234918","DOIUrl":null,"url":null,"abstract":"Lowest Common Ancestor networks (LCANs) are hierarchical interconnection networks for communication in SIMD and MIMD machines. The connectivity and permutational properties of specific families of LCANs have been previously studied. LCANs are built with switches in a tree-like manner. A level in the hierarchy is akin to a stage in a multistage interconnect and their topology is similar to that of hypertrees and fat trees. Their hierarchical structure lends itself to implementation in the fabrication hierarchy, namely chips, boards and backplanes. In this paper, a preliminary investigation of the algorithmic capabilities of LCANs (in terms of their parameters) is reported.<<ETX>>","PeriodicalId":117789,"journal":{"name":"[Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation","volume":"70 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-10-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"On the parallel processing capabilities of LCA networks\",\"authors\":\"I.D. Scherson, P.Y. Wang\",\"doi\":\"10.1109/FMPC.1992.234918\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Lowest Common Ancestor networks (LCANs) are hierarchical interconnection networks for communication in SIMD and MIMD machines. The connectivity and permutational properties of specific families of LCANs have been previously studied. LCANs are built with switches in a tree-like manner. A level in the hierarchy is akin to a stage in a multistage interconnect and their topology is similar to that of hypertrees and fat trees. Their hierarchical structure lends itself to implementation in the fabrication hierarchy, namely chips, boards and backplanes. In this paper, a preliminary investigation of the algorithmic capabilities of LCANs (in terms of their parameters) is reported.<<ETX>>\",\"PeriodicalId\":117789,\"journal\":{\"name\":\"[Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation\",\"volume\":\"70 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-10-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/FMPC.1992.234918\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FMPC.1992.234918","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 1

摘要

最低共同祖先网络(lcan)是用于SIMD和MIMD机器通信的分层互连网络。先前已经研究了特定家族的lcan的连通性和排列性质。lcan以树状的方式使用交换机构建。层次结构中的一个级别类似于多阶段互连中的一个阶段，它们的拓扑结构类似于超树和胖树。它们的分层结构有助于在制造层次结构中实现，即芯片、电路板和背板。本文对lcan的算法性能(根据其参数)进行了初步研究。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

On the parallel processing capabilities of LCA networks

Lowest Common Ancestor networks (LCANs) are hierarchical interconnection networks for communication in SIMD and MIMD machines. The connectivity and permutational properties of specific families of LCANs have been previously studied. LCANs are built with switches in a tree-like manner. A level in the hierarchy is akin to a stage in a multistage interconnect and their topology is similar to that of hypertrees and fat trees. Their hierarchical structure lends itself to implementation in the fabrication hierarchy, namely chips, boards and backplanes. In this paper, a preliminary investigation of the algorithmic capabilities of LCANs (in terms of their parameters) is reported.<>

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

[Proceedings 1992] The Fourth Symposium on the Frontiers of Massively Parallel Computation

自引率

0.00%

发文量