Implementation of double-gate junctionless transistor and its circuit performance analysis

In this paper, the utility of double-gate (DG) junctionless (JL) transistor in attaining better DC and analog/RF performances are demonstrated. The analysis is done by extracting drain current versus gate voltage characteristics, transconductance (gm), transconductance generation efficiency (gm/Ids), gate-to-gate capacitance (Cgg), ratio of gate-to-source capacitance (Cgs) to gate-to-drain capacitance (Cgd). Sensitivity analysis show that, JL transistors prove to be less sensitive to channel (gate) length variation as short-channel effect is amply controlled. It is also seen that ON-state current remains almost constant with increase in temperature. At a particular drain current (Ids) JL transistors achieve higher values of unity-gain cut-off frequency (fT) and gain bandwidth (GBW) product for ultra low power operation. Furthermore, mixed-mode circuit simulations have been performed by implementing Inverter circuit and a Common Source (CS) amplifier circuit using DG JL transistor. The inverter shows better noise margin for the given supply voltage. The CS amplifier gain increases with increase in RL. Maximum gain of 18 dB is obtained for RL= 15 KΩ with a 3-dB cut-off frequency of 0.955 THz. The results of these simulations give insights into the circuit level behaviour of JL transistor which can be used as a future device owing to its characteristics.