A. Valdes-Garcia, R. Venkatasubramanian, R. Srinivasan, J. Silva-Martínez, E. Sánchez-Sinencio
{"title":"用于无线收发器内置测试的CMOS RF RMS检测器","authors":"A. Valdes-Garcia, R. Venkatasubramanian, R. Srinivasan, J. Silva-Martínez, E. Sánchez-Sinencio","doi":"10.1109/VTS.2005.8","DOIUrl":null,"url":null,"abstract":"A CMOS RF RMS detector is introduced. It generates a DC proportional to the RMS voltage amplitude of an RF signal. Its high input impedance and small silicon area make it suitable for the built-in testing (BIT) of critical RF blocks of a transceiver such as a low noise amplifier (LNA) and power amplifier (PA) without affecting their performance and with minimum area overhead. The use of this structure in the fault detection and diagnosis of a wireless transceiver is described and illustrated with an example. The transistor-level implementation of the proposed circuit is discussed in detail. Post-layout simulation results using CMOS 0.35/spl mu/m technology show that this testing device is able to perform an RF to DC conversion at 2.4GHz in a dynamic range of 20dB using an area of only 0.0135mm/sup 2/ and presenting an equivalent input capacitance of 22.5fF.","PeriodicalId":268324,"journal":{"name":"23rd IEEE VLSI Test Symposium (VTS'05)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"84","resultStr":"{\"title\":\"A CMOS RF RMS detector for built-in testing of wireless transceivers\",\"authors\":\"A. Valdes-Garcia, R. Venkatasubramanian, R. Srinivasan, J. Silva-Martínez, E. Sánchez-Sinencio\",\"doi\":\"10.1109/VTS.2005.8\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A CMOS RF RMS detector is introduced. It generates a DC proportional to the RMS voltage amplitude of an RF signal. Its high input impedance and small silicon area make it suitable for the built-in testing (BIT) of critical RF blocks of a transceiver such as a low noise amplifier (LNA) and power amplifier (PA) without affecting their performance and with minimum area overhead. The use of this structure in the fault detection and diagnosis of a wireless transceiver is described and illustrated with an example. The transistor-level implementation of the proposed circuit is discussed in detail. Post-layout simulation results using CMOS 0.35/spl mu/m technology show that this testing device is able to perform an RF to DC conversion at 2.4GHz in a dynamic range of 20dB using an area of only 0.0135mm/sup 2/ and presenting an equivalent input capacitance of 22.5fF.\",\"PeriodicalId\":268324,\"journal\":{\"name\":\"23rd IEEE VLSI Test Symposium (VTS'05)\",\"volume\":\"14 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"84\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"23rd IEEE VLSI Test Symposium (VTS'05)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VTS.2005.8\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"23rd IEEE VLSI Test Symposium (VTS'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VTS.2005.8","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A CMOS RF RMS detector for built-in testing of wireless transceivers
A CMOS RF RMS detector is introduced. It generates a DC proportional to the RMS voltage amplitude of an RF signal. Its high input impedance and small silicon area make it suitable for the built-in testing (BIT) of critical RF blocks of a transceiver such as a low noise amplifier (LNA) and power amplifier (PA) without affecting their performance and with minimum area overhead. The use of this structure in the fault detection and diagnosis of a wireless transceiver is described and illustrated with an example. The transistor-level implementation of the proposed circuit is discussed in detail. Post-layout simulation results using CMOS 0.35/spl mu/m technology show that this testing device is able to perform an RF to DC conversion at 2.4GHz in a dynamic range of 20dB using an area of only 0.0135mm/sup 2/ and presenting an equivalent input capacitance of 22.5fF.