Formal verification of PLC controlled systems using Sensor Graphs

This paper describes how a system, consisting of a discrete controller (e.g. a PLC) that controls a physical plant/process, can be formally verified. The physical process is assumed to be modeled using Sensor Graphs, a discrete event modeling language directed at physical systems with binary and identity sensors (e.g. RFID). The formal and graphical syntaxes of Sensor Graphs are presented and exemplified. The “semitimed” semantics is defined considering a process model together with a controller model, represented as a discrete state equation. Finally, it is shown how requirements on the closedloop system, represented by a Sensor Graph and a controller model, can be verified using the model checker Cadence SMV.