高性能输出肖特基I2L/MTL

J. M. Herman
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引用次数: 5

摘要

介绍了第二代I2L/MTL门的设计和特性,该门具有五个去耦集电极,每个集电极都包含一个PtSi肖特基二极管。深埋集电极植入物用于最小化基极电流损耗和增加有效增益。与第二代具有N+集电极的栅极相比,交流性能提高了40 ~ 70%,这取决于有效肖特基势垒高度或外在延迟区域的逻辑摆幅。对于0.65 eV的有效肖特基势垒高度,该栅极在100 μ A注入电流下βeffu≥4和τ-d = 10 ns的军用温度范围(-55至125°C)内完全正常工作。在25°C时,在0.16 pJ的低注入电流下,速度功率乘积是恒定的,在100µA的注入电流下增加到0.7 pJ。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
High performance output Schottky I2L/MTL
The design and characterization of a second generation I2L/MTL gate with five decoupled collectors, each collector incorporating a PtSi Schottky diode, is presented. A deep buried-collector implant is used to minimize base current losses and increase the effective up gain. An increase in A.C. performance by 40 to 70% over the second generation gate with N+collectors is obtained which depends on the effective Schottky barrier height or logic swing in the region of extrinsic delay. For an effective Schottky barrier height of 0.65 eV, the gate is fully functional over the military temperature range of -55 to 125°C where βeffu≥ 4 and τ-d = 10 ns at 100 µA injector current. At 25°C the speed power product is constant for low injector currents at 0.16 pJ and increases to 0.7 pJ at 100 µA injector current.
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