{"title":"基于hfb的ADC的设计、优化与实现","authors":"A. Lesellier, O. Jamin, J. Bercher, O. Venard","doi":"10.1109/ECCTD.2011.6043296","DOIUrl":null,"url":null,"abstract":"This paper presents a two-channel Hybrid Filter Bank (HFB) Analog-to-Digital Converter (ADC) that targets broadband digitization, for Cognitive Radio (CR) applications. The proposed architecture partitioning uses low-cost third order Butterworth analog filters and fourth order digital IIR filters. The optimization algorithm combines direct simplex search, minimax methods and a perturbation strategy to avoid local minima. A sensitivity study of the analog filters quantifies the impact of poles and zeros spread on system performance. Finally, the experimental results obtained from our concrete realization are reported. The measurements show the aliasing rejection provided by HFB structure and confirms the parallel architecture sensitivity to analog mismatches.","PeriodicalId":126960,"journal":{"name":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"Design, optimization and realization of an HFB-based ADC\",\"authors\":\"A. Lesellier, O. Jamin, J. Bercher, O. Venard\",\"doi\":\"10.1109/ECCTD.2011.6043296\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a two-channel Hybrid Filter Bank (HFB) Analog-to-Digital Converter (ADC) that targets broadband digitization, for Cognitive Radio (CR) applications. The proposed architecture partitioning uses low-cost third order Butterworth analog filters and fourth order digital IIR filters. The optimization algorithm combines direct simplex search, minimax methods and a perturbation strategy to avoid local minima. A sensitivity study of the analog filters quantifies the impact of poles and zeros spread on system performance. Finally, the experimental results obtained from our concrete realization are reported. The measurements show the aliasing rejection provided by HFB structure and confirms the parallel architecture sensitivity to analog mismatches.\",\"PeriodicalId\":126960,\"journal\":{\"name\":\"2011 20th European Conference on Circuit Theory and Design (ECCTD)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-10-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 20th European Conference on Circuit Theory and Design (ECCTD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECCTD.2011.6043296\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCTD.2011.6043296","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design, optimization and realization of an HFB-based ADC
This paper presents a two-channel Hybrid Filter Bank (HFB) Analog-to-Digital Converter (ADC) that targets broadband digitization, for Cognitive Radio (CR) applications. The proposed architecture partitioning uses low-cost third order Butterworth analog filters and fourth order digital IIR filters. The optimization algorithm combines direct simplex search, minimax methods and a perturbation strategy to avoid local minima. A sensitivity study of the analog filters quantifies the impact of poles and zeros spread on system performance. Finally, the experimental results obtained from our concrete realization are reported. The measurements show the aliasing rejection provided by HFB structure and confirms the parallel architecture sensitivity to analog mismatches.