{"title":"基于IRIS的建筑综合图像处理算法","authors":"D. Trainor, Roger Francis Woods, J. McCanny","doi":"10.1109/VLSISP.1995.527488","DOIUrl":null,"url":null,"abstract":"Details are presented of the IRIS synthesis system for high-performance digital signal processing. This tool allows non-specialists to automatically derive VLSI circuit architectures from high-level, algorithmic representations, and provides a quick route to silicon implementation. The applicability of the system is demonstrated using the design example of a one-dimensional Discrete Cosine Transform circuit.","PeriodicalId":286121,"journal":{"name":"VLSI Signal Processing, VIII","volume":"27 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1995-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Architectural synthesis of an image processing algorithm using IRIS\",\"authors\":\"D. Trainor, Roger Francis Woods, J. McCanny\",\"doi\":\"10.1109/VLSISP.1995.527488\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Details are presented of the IRIS synthesis system for high-performance digital signal processing. This tool allows non-specialists to automatically derive VLSI circuit architectures from high-level, algorithmic representations, and provides a quick route to silicon implementation. The applicability of the system is demonstrated using the design example of a one-dimensional Discrete Cosine Transform circuit.\",\"PeriodicalId\":286121,\"journal\":{\"name\":\"VLSI Signal Processing, VIII\",\"volume\":\"27 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1995-10-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"VLSI Signal Processing, VIII\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSISP.1995.527488\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"VLSI Signal Processing, VIII","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSISP.1995.527488","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Architectural synthesis of an image processing algorithm using IRIS
Details are presented of the IRIS synthesis system for high-performance digital signal processing. This tool allows non-specialists to automatically derive VLSI circuit architectures from high-level, algorithmic representations, and provides a quick route to silicon implementation. The applicability of the system is demonstrated using the design example of a one-dimensional Discrete Cosine Transform circuit.