A power amplifier with envelope tracking used for cellular front-end module based on 0.18μm SOI CMOS process

An ET-PA used for battery supplied Front-End Module (FEM) is fabricated with IBM 0.18μm silicon-on-insulator (SOI) CMOS process. The 2-stages single-end SOI CMOS PA employs stacked-FET along with optimal bias and cancelling capacitance variation linearization method. Harmonic short at the output is used for improved linearity and stability. The supply modulator employs hybrid topology for linearity and efficiency trade-off. In measurement, the LTE signal mask is met without using a digital pre-distortion technique. For 20MHz 16QAM long-term evolution (LTE) signal at 2.3GHz carrier, the ET-PA module achieves a power-added efficiency of 30% with an error vector magnitude of 3.4% and an adjacent channel leakage ratio of 30dBc at an average output power of 26dBm.