A Low-voltage Non-binary Cyclic ADC using Fully Differential Ring Amplifier

This paper presents a non-binary cyclic analog-to-digital converter (ADC) with fully differential ring amplifier in 65nm SOTB CMOS technology for low power supply voltage applications. By utilizing substrate voltage control technique of SOTB CMOS, high gain dynamic amplifier is realized at low supply voltage. In a cyclic ADC with proposed fully differential ring amplifier, the number of reset mode can be reduced because the reset mode is provided only once per AD conversion instead of each conversion step. And hence, offset cancellation capacitors in the multiplying digital-to-analog converter (MDAC) with ring amplifier switched-capacitor (SC) circuits can be removed. As the results, not only the active area for capacitors, but also input referred noise of MDAC can be reduced. Proposed non-binary cyclic ADC with fully differential ring amplifier can be realized at supply voltage as low as Vdd =0.75V. SPICE simulation results confirm the feasibility and reliability of proposed technique to realize a high-resolution ADC at low supply voltage.