L. Manoliu, B. Schoch, M. Koller, Jens Wieczorek, S. Klinkner, I. Kallfass
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High-speed FPGA-Based Payload Computer for an In-Orbit Verification of a 71–76 GHz Satellite Downlink
This paper introduces the system architecture, implementation and measured characterization of the FPGA-based adaptive onboard payload computer used for an in-orbit verification of an E-band high bandwidth communication system. The mission goal is to evaluate the atmospheric effects on a multiGigabit data-downlink, in the frequency range of 71–76 GHz with a data rate of minimum 10 Gbit/s, from a 6U CubeSat in low earth orbit to a ground station. The miniaturized onboard payload computer in conjunction with a fast digital-to-analog converter shall serve as an arbitrary waveform generator and as image processing unit.