{"title":"复制直方图并行处理在高级合成自动图像二值化中的作用","authors":"Moena Yamasaki, A. Yamawaki","doi":"10.1109/PDCAT46702.2019.00105","DOIUrl":null,"url":null,"abstract":"The high-level synthesis converting software to hardware automatically is one of the important technologies for significantly reducing the burden caused by developing hardware module. The embedded image processing products need the HLS to quickly implement a hardware module achieving high-performance with low-power consumption instead of software implementation for high-computational processing. However, the HLS tool cannot generate a hardware module with high-performance and low-power consumption expected when the software program without deep consideration about the hardware organization to be generated is input. This paper shows a software description method to extract some parallelisms by duplicating the histograms in the automatic image binarization which is called as Otsu's method in order to improve a performance of the hardware module HLS generates. The experimental results show the effect of our description method about the performance and the amount of hardware. We also discuss about a trade-off among the parallelism, performance and amount of hardware.","PeriodicalId":166126,"journal":{"name":"2019 20th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Effect of Parallel Processing by Duplicating Histogram in Automatic Image Binarization for High-Level Synthesis\",\"authors\":\"Moena Yamasaki, A. Yamawaki\",\"doi\":\"10.1109/PDCAT46702.2019.00105\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The high-level synthesis converting software to hardware automatically is one of the important technologies for significantly reducing the burden caused by developing hardware module. The embedded image processing products need the HLS to quickly implement a hardware module achieving high-performance with low-power consumption instead of software implementation for high-computational processing. However, the HLS tool cannot generate a hardware module with high-performance and low-power consumption expected when the software program without deep consideration about the hardware organization to be generated is input. This paper shows a software description method to extract some parallelisms by duplicating the histograms in the automatic image binarization which is called as Otsu's method in order to improve a performance of the hardware module HLS generates. The experimental results show the effect of our description method about the performance and the amount of hardware. We also discuss about a trade-off among the parallelism, performance and amount of hardware.\",\"PeriodicalId\":166126,\"journal\":{\"name\":\"2019 20th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT)\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2019-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2019 20th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/PDCAT46702.2019.00105\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 20th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/PDCAT46702.2019.00105","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Effect of Parallel Processing by Duplicating Histogram in Automatic Image Binarization for High-Level Synthesis
The high-level synthesis converting software to hardware automatically is one of the important technologies for significantly reducing the burden caused by developing hardware module. The embedded image processing products need the HLS to quickly implement a hardware module achieving high-performance with low-power consumption instead of software implementation for high-computational processing. However, the HLS tool cannot generate a hardware module with high-performance and low-power consumption expected when the software program without deep consideration about the hardware organization to be generated is input. This paper shows a software description method to extract some parallelisms by duplicating the histograms in the automatic image binarization which is called as Otsu's method in order to improve a performance of the hardware module HLS generates. The experimental results show the effect of our description method about the performance and the amount of hardware. We also discuss about a trade-off among the parallelism, performance and amount of hardware.