一个0.3µW,2.1µVrms的低噪声直流伺服回路神经记录斩波放大器

2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA) Pub Date : 2022-10-28 DOI:10.1109/ICTA56932.2022.9963006

Yuchen Bao, Weijian Chen, Zhixian Li, Yongsen Chen, Yanhan Zeng

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引用次数: 0

摘要

提出了一种低噪声、低功耗的神经记录电路。为了降低系统噪声，提出了一种内置直流反馈的电容耦合斩波仪表放大器(CCIA)。在系统的输出端实现了一个连续低通滤波器(LPF)，并利用大块反馈技术来增加其输出摆幅。此外，将直流模块和基于斩波-电容-斩波积分器的直流伺服环路(C3IB-DSL)相结合以减少干扰。实验表明，该电路在1.2 V电压下功耗仅为0.3µW。同时，输入参考噪声达到2.1µVrms，噪声效率因子(NEF)达到3.6。所提出的CCIA在180n CMOS工艺中进行了仿真。

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A 0.3-µW,2.1-µVrms Neural Recording Chopper Amplifier with Low Noise DC-Servo-Loop

This paper presents a low noise and low power circuit for neural recording. A Capacitively-Coupled Chopper Instrumentation Amplifier (CCIA) with embedded DC feedback is proposed to reduce the noise of system. Implemented a continuous-time low-pass filter (LPF) at the output of the system and utilized bulk-feedback techniques to increase its output swing. Furthermore, the DC-block and Chopper-Capacitor-Chopper Integrator Based DC Servo Loop (C3IB-DSL) are combined to reduce the interferences. According to experiment, the circuit consumes only 0.3 µW at 1.2 V. In addition, the input-referred noise reached 2.1 µVrms and the noise efficiency factor (NEF) 3.6 at the same time. The proposed CCIA was simulated in a 180n CMOS process.

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2022 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)

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