可重构的转发器处理器架构

[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track Pub Date : 1989-01-03 DOI:10.1109/HICSS.1989.47178

D. Nicole

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引用次数: 13

摘要

作者描述了在真正的科学和工程应用中具有千兆次浮点运算(数十亿浮点运算)性能的并发处理计算机，这是作为Esprit 805项目的一部分开发的。该体系结构可以很容易地扩展到超过一千个处理器，并在一系列有价值的问题上提供真正经济有效的计算。还支持实时应用程序，使用可选的高带宽输入输出设施。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Reconfigurable transputer processor architectures

The author describes concurrent-processing computers capable of performance in the gigaflop (billions of floating-point operators) range on real scientific and engineering applications, which have ben developed as part of Esprit project 805. The architecture is readily scalable up to over a thousand processors and provides genuinely cost-effective computing on a worthwhile range of problems. Real-time applications are also supported, using optional high-bandwidth input-output facilities.<>

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来源期刊

[1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track

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