记忆用Z2FET老化诱导时间相关变异性的建模

2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) Pub Date : 2018-09-01 DOI:10.1109/SISPAD.2018.8551718

M. Duan, B. Cheng, C. Bailón, F. Adamu-Lema, P. Asenov, C. Millar, P. Pfaeffli, A. Asenov

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引用次数: 0

摘要

Z2FET是一种很有前途的集成DRAM器件，可以取代传统的1晶体管1电容DRAM[1 - 4]。存储产品总是要求在有限的芯片空间内实现最小的单元尺寸、高密度和大容量存储阵列。然而，减小Z2FET尺寸会导致严重的可变性问题。人们已经提出了一种新的模拟方法来研究Z2FET的初始统计变异性(SV)，但从未考虑老化引起的时间相关变异性(TDV)。

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Modelling on Aging Induced Time Dependent Variability of Z2FET for Memory Applications

Z2FET is a promising integrated DRAM device to replace the traditional 1 transistor 1 capacitor DRAM [1–4]. Memory products always require minimum cell size, high density and large volume memory arrays in the limited chip real estate. However, the downscaling of Z2FET dimensions leads to severe variability issues. A novel simulation methodology has been already proposed [5] to investigate the initial Z2FET Statistical Variability (SV), but the aging induced Time Dependent Variability (TDV) has never been considered.

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2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)

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