物联网应用中两种ADPLL结构的比较

R. Dinesh, R. Marimuthu
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引用次数: 1

摘要

基于全数字锁相环(ADPLL)的无线收发器是基于物联网的无线通信的关键模块。锁相环的锁相时间、功耗和频率分辨率是提高物联网应用效率需要考虑的最重要参数。ADPLL由鉴相器、环路滤波器和数字控制振荡器三部分组成,上述参数的性能取决于ADPLL的组成部分。本文从锁相时间、频率分辨率、输出频率和相位噪声等重要参数出发,比较了两种ADPLL结构,即带bang - bang鉴相器、数字环路滤波器和环形振荡器的ADPLL和带bang - bang鉴相器、环路滤波器、自举环振荡器带TDC的ADPLL,发现带bang - bang鉴相器、环路滤波器、自举环振荡器带TDC的ADPLL最适合物联网应用。输出频率为3.5 GHz。使用Xilinx ISE工具进行功能验证和仿真。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Comparison of Two ADPLL Structures for IoT Applications
All digital Phase locked loop (ADPLL) based wireless transceiver is a key block in IoT based wireless communications. Locking time, power consumption and frequency resolution of ADPLL are the most important parameters to be considered in increasing the efficiency of IoT applications. ADPLL consist of three components namely phase detector, loop filter and Digital controlled oscillator and the performance of above mentioned parameters depends on components Of ADPLL. In this paper two ADPLL structures, ADPLL with bang bang phase detector, Digital loop filter and Ring based oscillator and ADPLL with bang phase detector, loop filter , Bootstrapped ring oscillator with TDC are compared based on important parameters such as Locking time, frequency resolution, output frequency and phase noise and it is found that ADPLL with bang phase detector, loop filter, Bootstrapped ring oscillator with TDC is best suited for IoT applications. The output frequency is 3.5 GHz. The functional verification and simulation can be done using Xilinx ISE tool.
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