用于320兆赫2路σ - δ调制器的BiCMOS开关缓冲谐振器

F. Borghetti, A. Esposito, U. Gatti, P. Malcovati, F. Maloberti
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引用次数: 0

摘要

本文提出了一种适用于高速开关电容n路带通/spl Sigma//spl Delta/调制器的谐振电路。该谐振器采用0.8 /spl mu/m SiGe BiCMOS工艺(f/sub /=35 GHz)实现,利用双极晶体管实现的开关缓冲器以更高的速度模拟CMOS开关行为。该电路的谐振频率为77.5 MHz,工作时钟频率为160 MHz,从5v电源消耗120 mA。此外,仿真已经证实,采用所提出的技术,时钟频率高达200mhz可以使用,而不会显著降低性能。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
BiCMOS switched buffers resonator for a 320 MHz 2-path sigma-delta modulator
In this paper we present a resonator circuit suitable for the implementation of high speed switched-capacitor n-path bandpass /spl Sigma//spl Delta/ modulators. The resonator, implemented using a 0.8 /spl mu/m SiGe BiCMOS process (f/sub T/=35 GHz), exploits switched buffers realized using bipolar transistors to emulate the CMOS switches behavior at much higher speed. The circuit has a resonance frequency of 77.5 MHz and operates at a clock frequency of 160 MHz, consuming 120 mA from a 5 V power supply. Moreover, simulations have confirmed that with the proposed technique clock frequencies up to 200 MHz can be used without significant degradation of the performance.
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