{"title":"摘要:嵌入视觉人工智能的挑战与解决方案","authors":"Charles Qi","doi":"10.1109/EMC2.2018.00007","DOIUrl":null,"url":null,"abstract":"Recently computer vision and neural network based AI technology have seen explosive demands in embedded systems such as robots, drones, autonomous vehicles, etc. Due to cost and power constraints, it remains quite challenging to achieve satisfactory performance, while maintaining power efficiency and scalability for embedded vision AI. This presentation first analyzes the technical challenges of embedding vision AI, from the perspectives of algorithm complexity, computation and memory BW demands, and constrains of power consumption profile. The analysis shows that modern neural networks for vision AI contain complex topology and diversified computation steps. These neural networks are often part of a large embedded vision processing pipeline, intermixed with conventional vision algorithms. As a result, the vision AI implementation demands several TOPS computation performance and ten's of GB memory BW. Subsequently the architecture of Tensilica Vision AI DSP processor technology is presented with three distinctive advantages: The optimized instruction sets of Vision P6 and Vision C5 DSP are explained as examples of achieving instruction level computation efficiency and performance. This is coupled with unique processor architecture features for achieving SoC level data processing efficiency and scalability that lead to a high-performance vision AI sub-system. The fully automated AI optimization framework, software libraries and tools provide practical performance tuning methodology and rapid turn-around time for embedded vision AI system design. In conclusion, the presentation offers considerations for future research and development to bring embedded vision AI to the next performance level.","PeriodicalId":377872,"journal":{"name":"2018 1st Workshop on Energy Efficient Machine Learning and Cognitive Computing for Embedded Applications (EMC2)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Invited Talk Abstract: Challenges and Solutions for Embedding Vision AI\",\"authors\":\"Charles Qi\",\"doi\":\"10.1109/EMC2.2018.00007\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Recently computer vision and neural network based AI technology have seen explosive demands in embedded systems such as robots, drones, autonomous vehicles, etc. Due to cost and power constraints, it remains quite challenging to achieve satisfactory performance, while maintaining power efficiency and scalability for embedded vision AI. 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引用次数: 4
摘要
最近,基于计算机视觉和神经网络的人工智能技术在机器人、无人机、自动驾驶汽车等嵌入式系统中出现了爆炸式的需求。由于成本和功率的限制,在保持嵌入式视觉人工智能的功率效率和可扩展性的同时,实现令人满意的性能仍然是相当具有挑战性的。本报告首先从算法复杂度、计算和内存BW需求以及功耗限制等方面分析了嵌入视觉人工智能的技术挑战。分析表明,用于视觉人工智能的现代神经网络拓扑结构复杂,计算步骤多样。这些神经网络通常是大型嵌入式视觉处理管道的一部分,与传统的视觉算法混合在一起。因此,视觉人工智能的实现需要几个TOPS的计算性能和几十GB的内存BW。随后,介绍了Tensilica Vision AI DSP处理器技术的架构,该技术具有三个独特的优势:以Vision P6和Vision C5 DSP优化指令集为例,说明了如何实现指令级计算效率和性能。这与独特的处理器架构功能相结合,实现了SoC级的数据处理效率和可扩展性,从而形成了高性能的视觉AI子系统。全自动人工智能优化框架、软件库和工具为嵌入式视觉人工智能系统设计提供了实用的性能调优方法和快速的周转时间。综上所述,该演讲为未来的研究和开发提供了考虑,以将嵌入式视觉人工智能提升到下一个性能水平。
Invited Talk Abstract: Challenges and Solutions for Embedding Vision AI
Recently computer vision and neural network based AI technology have seen explosive demands in embedded systems such as robots, drones, autonomous vehicles, etc. Due to cost and power constraints, it remains quite challenging to achieve satisfactory performance, while maintaining power efficiency and scalability for embedded vision AI. This presentation first analyzes the technical challenges of embedding vision AI, from the perspectives of algorithm complexity, computation and memory BW demands, and constrains of power consumption profile. The analysis shows that modern neural networks for vision AI contain complex topology and diversified computation steps. These neural networks are often part of a large embedded vision processing pipeline, intermixed with conventional vision algorithms. As a result, the vision AI implementation demands several TOPS computation performance and ten's of GB memory BW. Subsequently the architecture of Tensilica Vision AI DSP processor technology is presented with three distinctive advantages: The optimized instruction sets of Vision P6 and Vision C5 DSP are explained as examples of achieving instruction level computation efficiency and performance. This is coupled with unique processor architecture features for achieving SoC level data processing efficiency and scalability that lead to a high-performance vision AI sub-system. The fully automated AI optimization framework, software libraries and tools provide practical performance tuning methodology and rapid turn-around time for embedded vision AI system design. In conclusion, the presentation offers considerations for future research and development to bring embedded vision AI to the next performance level.