K.C. Lin, Y.C. Lu, L.P. Li, B.T. Chen, H. Chang, H. Lu, S. Jeng, S. Jang, M. Liang
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引用次数: 0
摘要
多孔低钾介质用于铜双大马士革(DD)互连的可靠性问题已经被新的薄膜形成方法、图像化方法和结构设计所消除。结果表明,采用k=2.2、孔径/spl sim/2.8nm的多孔CVD LK构建的互连材料的BEOL时间相关介电击穿(BEOL TDDB)性能与薄膜孔隙完整性不一致,在0.3 MV/cm和125/spl度/C下,TDDB T/sub / 63/预测为1 /spl次/ 10/sup / 9/年。进一步的研究还表明,与LK材料相关的弱力学和差热性能对其互连电迁移和应力迁移性能的影响可以通过各种界面工程来消除,EM寿命为0.12 /spl μ l /m Cu线或0.13 /spl μ l /m通孔在1 MA/cm/sup 2/和110/spl℃下超过400k小时或150k小时。在150℃/spl℃下热退火500小时后,所有测试结构的通孔的SM故障率= 0 (>100% Re shift)。
Reliability robustness of 65nm BEOL Cu damascene interconnects using porous CVD low-k dielectrics with k = 2.2
Reliability concerns over the applications of porous low-k dielectrics for Cu dual damascene (DD) interconnects have been dismissed with novel film formation methods, patterning approaches and structure designs. Results showed that the BEOL time dependent dielectric breakdown (BEOL TDDB) performance of interconnects built using porous CVD LK's with k=2.2 and pore size /spl sim/2.8nm were not comprised with film pore integrity retained to have TDDB T/sub 63/ predicted to be 1 /spl times/ 10/sup 9/ yrs at 0.3 MV/cm and 125/spl deg/C. Further investigations also revealed that the impacts of weak mechanical and poor thermal properties associated with the LK material on its interconnect electromigration and stress migration performances can be demolished through various interface engineering with EM lifetimes of 0.12 /spl mu/m Cu lines or 0.13 /spl mu/m vias at 1 MA/cm/sup 2/ and 110/spl deg/C longer than 400k hrs or 150k hrs, and SM failure rate = 0 (>100% Re shift) for vias on all test structures after thermal annealing at 150/spl deg/C for 500 hrs.