基于环形振荡器的TSV故障检测方法有效性评价

Nikolaos Georgoulopoulos, Alkiviadis A. Hatzopoulos
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引用次数: 8

摘要

在3D堆叠集成电路的制造过程中,会出现各种各样的缺陷,导致性能和可靠性降低。这些缺陷可能会在制造的早期阶段产生严重的问题。这种情况变得更加困难,因为在晶圆减薄之前和之后,对tsv的测试途径有限。基于无故障TSV和有缺陷TSV的频率差,分析了基于振荡的键合前TSV测试方法的有效性。tsv被嵌入到环形振荡器中,建模为RC元件,并测量频率。当有缺陷的TSV插入环形振荡器时,会导致电路频率的变化。频率的改变可以帮助我们检测漏电和电阻性断路故障。在每种情况下(无故障或故障)都使用了许多蒙特卡罗模拟,以验证测试的鲁棒性。环形振荡器采用65nm CMOS工艺模型设计。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Effectiveness evaluation of the TSV fault detection method using ring oscillators
During the 3D Stacked ICs fabrication, various defects in TSVs could come up, resulting both in performance and reliability reduction. These defects could produce serious problems in the early stages of fabrication. The situation gets more difficult because there is limited test access to TSVs, before and after wafer thinning. An analysis of effectiveness on oscillation-based pre-bond TSV test methods, based on frequency difference between a fault-free and a defective TSV, is presented. TSVs are embedded, modeled as RC elements, in a ring oscillator and the frequency is measured. When a defective TSV is inserted to the ring oscillator, it results to variations in the frequency of the circuit. The alteration of the frequency can lead us to the detection of leakage and resistive open faults. Many Monte Carlo simulations are used in each case (fault-free or faulty), to verify the robustness of the test. 65nm CMOS technology models were used for the design of the ring oscillators.
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