使用固定功率预算的频率缩放多核加速模型

Seungwon Lee, Seung Hun Kim, W. Ro
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引用次数: 1

摘要

在多核处理器中,通过频率缩放来利用具有延迟故障的核心可以减少性能下降。由于动态功率与时钟频率成正比,在一定的功率预算范围内,降低延时故障芯的频率,可以提高其他芯的频率。针对多核架构的频率缩放问题,提出了两种基于改进Amdahl定律的加速模型。从这些模型中,我们得到了具有延迟故障核的多核处理器可实现的最大加速。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Multicore speedup models using frequency scaling with fixed power budget
Utilization of a core with delay faults by frequency scaling reduces performance degradation in a multicore processor. When the frequency of a delay fault core is decreased, frequencies of the rest cores can be increased within a fixed power budget since the amount of dynamic power is proportional to the clock frequency. We propose two speedup models based on modified Amdahl's law for the frequency scaling of a multicore architecture. From the models, we derive an attainable maximum speedup of a multicore processor with a delay fault core.
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