基于动态阈值MOS的低功耗XNOR单端压控振荡器电路设计

Vivek Jangra, M. Kumar
{"title":"基于动态阈值MOS的低功耗XNOR单端压控振荡器电路设计","authors":"Vivek Jangra, M. Kumar","doi":"10.1145/3474124.3474141","DOIUrl":null,"url":null,"abstract":"This paper proposes a single-ended voltage-controlled oscillator (VCO) circuit design using XNOR gate as the basic delay element and dynamic threshold MOS (DTMOS) as the tuning element at the output node of the delay stage. The proposed PN-DTMOS ring oscillator achieves a frequency tuning range of 4.41 GHz to 4.05 GHz with variations in tuning voltage from 0V to 0.7V. The power dissipation of the proposed VCO is as low as 1.071 mW. This VCO achieves a frequency tuning range of 1.46 GHz to 4.12 GHz and power dissipation in the range of 0.123 mW to 1.067 mW with variations in power supply voltage from 1V to 1.8V. Proposed VCO shows a phase noise of -72.88 dBc/Hz@1MHz with the figure of merit (FoM) of -152.52 dBc/Hz with PN-DTMOS varactor tuning. This new approach using the forward body biasing technique can adjust the transistor’s threshold voltage.","PeriodicalId":144611,"journal":{"name":"2021 Thirteenth International Conference on Contemporary Computing (IC3-2021)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-08-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Low Power XNOR based Single Ended VCO Circuit Design with Dynamic Threshold MOS\",\"authors\":\"Vivek Jangra, M. Kumar\",\"doi\":\"10.1145/3474124.3474141\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a single-ended voltage-controlled oscillator (VCO) circuit design using XNOR gate as the basic delay element and dynamic threshold MOS (DTMOS) as the tuning element at the output node of the delay stage. The proposed PN-DTMOS ring oscillator achieves a frequency tuning range of 4.41 GHz to 4.05 GHz with variations in tuning voltage from 0V to 0.7V. The power dissipation of the proposed VCO is as low as 1.071 mW. This VCO achieves a frequency tuning range of 1.46 GHz to 4.12 GHz and power dissipation in the range of 0.123 mW to 1.067 mW with variations in power supply voltage from 1V to 1.8V. Proposed VCO shows a phase noise of -72.88 dBc/Hz@1MHz with the figure of merit (FoM) of -152.52 dBc/Hz with PN-DTMOS varactor tuning. This new approach using the forward body biasing technique can adjust the transistor’s threshold voltage.\",\"PeriodicalId\":144611,\"journal\":{\"name\":\"2021 Thirteenth International Conference on Contemporary Computing (IC3-2021)\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-08-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 Thirteenth International Conference on Contemporary Computing (IC3-2021)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/3474124.3474141\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 Thirteenth International Conference on Contemporary Computing (IC3-2021)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/3474124.3474141","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

本文提出了一种单端压控振荡器(VCO)电路设计,该电路采用XNOR门作为基本延迟元件,动态门限MOS (DTMOS)作为延迟级输出节点的调谐元件。所提出的PN-DTMOS环形振荡器的频率调谐范围为4.41 GHz ~ 4.05 GHz,调谐电压为0V ~ 0.7V。该压控振荡器的功耗低至1.071 mW。该VCO的频率调谐范围为1.46 GHz至4.12 GHz,功耗范围为0.123 mW至1.067 mW,电源电压变化范围为1V至1.8V。采用PN-DTMOS变容管调谐后,VCO的相位噪声为-72.88 dBc/Hz@1MHz,品质因数(FoM)为-152.52 dBc/Hz。这种利用正向体偏置技术的新方法可以调节晶体管的阈值电压。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Low Power XNOR based Single Ended VCO Circuit Design with Dynamic Threshold MOS
This paper proposes a single-ended voltage-controlled oscillator (VCO) circuit design using XNOR gate as the basic delay element and dynamic threshold MOS (DTMOS) as the tuning element at the output node of the delay stage. The proposed PN-DTMOS ring oscillator achieves a frequency tuning range of 4.41 GHz to 4.05 GHz with variations in tuning voltage from 0V to 0.7V. The power dissipation of the proposed VCO is as low as 1.071 mW. This VCO achieves a frequency tuning range of 1.46 GHz to 4.12 GHz and power dissipation in the range of 0.123 mW to 1.067 mW with variations in power supply voltage from 1V to 1.8V. Proposed VCO shows a phase noise of -72.88 dBc/Hz@1MHz with the figure of merit (FoM) of -152.52 dBc/Hz with PN-DTMOS varactor tuning. This new approach using the forward body biasing technique can adjust the transistor’s threshold voltage.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信