An Energy-Efficient LDO for Biomedical Implantable Devices

With the development of integrated circuits, miniaturized implantable devices have been proven a prospective treatment in clinics. As these devices need to acquire weak bio-signals, the ability to reject power ripple in noise-sensitive analog front-end is highly demanded. This paper presents an energy efficient low dropout regulator in biomedical implantable devices. The proposed circuit comprises conventional topology while adding a simple yet effective branch to overcome the limitation of the power supply rejection ratio. The LDO utilizes internal compensation to improve its stability with a 1 mA maximum load current. The LDO is designed in SMIC 0.18 μm 1P5M Mixed CMOS process, exhibiting a phase margin over 50° under all process, voltage and temperature corners. Its input voltage can be as low as 1.9 V when providing a 1.8 V voltage. The PSRR is −57.8 dB at DC and has still −40 dB at 20 KHz with a 1 mA load current. The quiescent current consumption is 23.6 μA with bandgap included.