{"title":"基于InP HEMT技术的d波段单片低噪声放大器","authors":"D. Yang, J. Wen, M. He, Ruicong He","doi":"10.1109/ISAPE.2018.8634087","DOIUrl":null,"url":null,"abstract":"In this paper, a D-band monolithic microwave integrated circuit low noise amplifier (LNA) is designed by using $0.5 \\mu\\mathbf{m}$ InP high electron mobility transistor (HEMT) technology. The circuit is mainly composed of five-stage of common-source amplification structure, and resistance and capacitance are connected in series to form a feedback network, which can improve the stability of the circuit. The series resistance and parallel grounding capacitance on the DC bias circuit constitute a low-pass structure, which is to absorb the gain of the circuit at low frequency, prevent the circuit from self-oscillation. In the 120-150GHz frequency range, the simulated gain is above 18.5 dB, and the noise figure is lower than 4.5dB. The area of this chip is $1.12\\times 0.62\\mathbf{mm}^{2}$, and the power consumption of the whole circuit is 47mW.","PeriodicalId":297368,"journal":{"name":"2018 12th International Symposium on Antennas, Propagation and EM Theory (ISAPE)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"A D-band Monolithic Low Noise Amplifier on InP HEMT Technology\",\"authors\":\"D. Yang, J. Wen, M. He, Ruicong He\",\"doi\":\"10.1109/ISAPE.2018.8634087\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a D-band monolithic microwave integrated circuit low noise amplifier (LNA) is designed by using $0.5 \\\\mu\\\\mathbf{m}$ InP high electron mobility transistor (HEMT) technology. The circuit is mainly composed of five-stage of common-source amplification structure, and resistance and capacitance are connected in series to form a feedback network, which can improve the stability of the circuit. The series resistance and parallel grounding capacitance on the DC bias circuit constitute a low-pass structure, which is to absorb the gain of the circuit at low frequency, prevent the circuit from self-oscillation. In the 120-150GHz frequency range, the simulated gain is above 18.5 dB, and the noise figure is lower than 4.5dB. The area of this chip is $1.12\\\\times 0.62\\\\mathbf{mm}^{2}$, and the power consumption of the whole circuit is 47mW.\",\"PeriodicalId\":297368,\"journal\":{\"name\":\"2018 12th International Symposium on Antennas, Propagation and EM Theory (ISAPE)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 12th International Symposium on Antennas, Propagation and EM Theory (ISAPE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISAPE.2018.8634087\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 12th International Symposium on Antennas, Propagation and EM Theory (ISAPE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISAPE.2018.8634087","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A D-band Monolithic Low Noise Amplifier on InP HEMT Technology
In this paper, a D-band monolithic microwave integrated circuit low noise amplifier (LNA) is designed by using $0.5 \mu\mathbf{m}$ InP high electron mobility transistor (HEMT) technology. The circuit is mainly composed of five-stage of common-source amplification structure, and resistance and capacitance are connected in series to form a feedback network, which can improve the stability of the circuit. The series resistance and parallel grounding capacitance on the DC bias circuit constitute a low-pass structure, which is to absorb the gain of the circuit at low frequency, prevent the circuit from self-oscillation. In the 120-150GHz frequency range, the simulated gain is above 18.5 dB, and the noise figure is lower than 4.5dB. The area of this chip is $1.12\times 0.62\mathbf{mm}^{2}$, and the power consumption of the whole circuit is 47mW.