M. Mergens, C. Russ, K. Verhaege, J. Armer, P. Jozwiak, R. Mohn, B. Keppens, C. S. Trinh
{"title":"用于BiCMOS SiGe hbt和CMOS超薄栅氧化物的RF-ESD保护的二极管触发可控硅(DTSCR)","authors":"M. Mergens, C. Russ, K. Verhaege, J. Armer, P. Jozwiak, R. Mohn, B. Keppens, C. S. Trinh","doi":"10.1109/IEDM.2003.1269334","DOIUrl":null,"url":null,"abstract":"A novel diode-triggered SCR (DTSCR) ESD protection element is introduced for low-voltage application (signal, supply voltage /spl les/1.8 V) and extremely narrow ESD design margins. Trigger voltage engineering in conjunction with fast and efficient SCR voltage clamping is applied for the protection of ultra-sensitive circuit nodes, such as SiGe HBT bases (e.g. f/sub Tmax/=45 GHz in BiCMOS-0.35 /spl mu/m LNA input) and thin gate-oxides (e.g. tox=1.7 nm in CMOS-0.09 /spl mu/m input). SCR integration is possible based on CMOS devices or can alternatively be formed by high-speed SiGe HBTs.","PeriodicalId":344286,"journal":{"name":"IEEE International Electron Devices Meeting 2003","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"93","resultStr":"{\"title\":\"Diode-triggered SCR (DTSCR) for RF-ESD protection of BiCMOS SiGe HBTs and CMOS ultra-thin gate oxides\",\"authors\":\"M. Mergens, C. Russ, K. Verhaege, J. Armer, P. Jozwiak, R. Mohn, B. Keppens, C. S. Trinh\",\"doi\":\"10.1109/IEDM.2003.1269334\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A novel diode-triggered SCR (DTSCR) ESD protection element is introduced for low-voltage application (signal, supply voltage /spl les/1.8 V) and extremely narrow ESD design margins. Trigger voltage engineering in conjunction with fast and efficient SCR voltage clamping is applied for the protection of ultra-sensitive circuit nodes, such as SiGe HBT bases (e.g. f/sub Tmax/=45 GHz in BiCMOS-0.35 /spl mu/m LNA input) and thin gate-oxides (e.g. tox=1.7 nm in CMOS-0.09 /spl mu/m input). SCR integration is possible based on CMOS devices or can alternatively be formed by high-speed SiGe HBTs.\",\"PeriodicalId\":344286,\"journal\":{\"name\":\"IEEE International Electron Devices Meeting 2003\",\"volume\":\"18 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-12-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"93\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE International Electron Devices Meeting 2003\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2003.1269334\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Electron Devices Meeting 2003","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2003.1269334","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Diode-triggered SCR (DTSCR) for RF-ESD protection of BiCMOS SiGe HBTs and CMOS ultra-thin gate oxides
A novel diode-triggered SCR (DTSCR) ESD protection element is introduced for low-voltage application (signal, supply voltage /spl les/1.8 V) and extremely narrow ESD design margins. Trigger voltage engineering in conjunction with fast and efficient SCR voltage clamping is applied for the protection of ultra-sensitive circuit nodes, such as SiGe HBT bases (e.g. f/sub Tmax/=45 GHz in BiCMOS-0.35 /spl mu/m LNA input) and thin gate-oxides (e.g. tox=1.7 nm in CMOS-0.09 /spl mu/m input). SCR integration is possible based on CMOS devices or can alternatively be formed by high-speed SiGe HBTs.