{"title":"在NIOS II处理器上定制用于FPGA图像和媒体处理的16位浮点指令","authors":"D. Etiemble, S. Bouaziz, L. Lacassagne","doi":"10.1109/ESTMED.2005.1518073","DOIUrl":null,"url":null,"abstract":"We have implemented customized SIMD 16-bit floating point instructions on a NIOS II processor. On several image processing and media benchmarks for which the accuracy and dynamic range of this format is sufficient, a speed-up ranging from 1.5 to more than 2 is obtained versus the integer implementation. The hardware overhead remains limited and is compatible with the capacities of today's FPGAs.","PeriodicalId":119898,"journal":{"name":"3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005.","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-09-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"20","resultStr":"{\"title\":\"Customizing 16-bit floating point instructions on a NIOS II processor for FPGA image and media processing\",\"authors\":\"D. Etiemble, S. Bouaziz, L. Lacassagne\",\"doi\":\"10.1109/ESTMED.2005.1518073\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We have implemented customized SIMD 16-bit floating point instructions on a NIOS II processor. On several image processing and media benchmarks for which the accuracy and dynamic range of this format is sufficient, a speed-up ranging from 1.5 to more than 2 is obtained versus the integer implementation. The hardware overhead remains limited and is compatible with the capacities of today's FPGAs.\",\"PeriodicalId\":119898,\"journal\":{\"name\":\"3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005.\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-09-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"20\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESTMED.2005.1518073\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"3rd Workshop on Embedded Systems for Real-Time Multimedia, 2005.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESTMED.2005.1518073","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Customizing 16-bit floating point instructions on a NIOS II processor for FPGA image and media processing
We have implemented customized SIMD 16-bit floating point instructions on a NIOS II processor. On several image processing and media benchmarks for which the accuracy and dynamic range of this format is sufficient, a speed-up ranging from 1.5 to more than 2 is obtained versus the integer implementation. The hardware overhead remains limited and is compatible with the capacities of today's FPGAs.