基于FPGA的计算机作为内置自检结构的硬件仿真器

R. Wieler, Zaifu Zhang, R. McLeod
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引用次数: 2

摘要

电路仿真,使用动态可重构硬件是电路仿真的高速替代方案,特别是对于大型和复杂的设计。动态重构通过提供故障分级、可检测性和特征分析的统计信息,提高了有效分析组合和顺序电路测试的能力。提出了一种基于动态可重构现场可编程器件的硬件仿真环境。对于这项工作,我们的主要兴趣是在内置自测环境中的故障模拟的硬件加速和新的BIST技术的快速原型。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Using an FPGA based computer as a hardware emulator for built-in self-test structures
Circuit emulation, using dynamically reconfigurable hardware is a high speed alternative to circuit simulation, especially for large and complex designs. Dynamic reconfiguration enhances the ability to efficiently analyze the test of combinational and sequential circuits by providing statistical information on fault grading, detectability, and signature analysis. We present a hardware emulation environment based on dynamically reconfigurable field programmable devices. For this work our main interests are in hardware acceleration of fault simulation in a built-in self-test environment and rapid prototyping of new BIST techniques.<>
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