{"title":"低相位噪声低相位误差1.8 GHz正交CMOS压控振荡器","authors":"P. Andreani","doi":"10.1109/ISSCC.2002.993046","DOIUrl":null,"url":null,"abstract":"A 1.8 GHz quadrature VCO in standard 0.35 /spl mu/m CMOS with three metal layers shows -140 dBc/Hz or less phase noise across an 18% tuning range, while drawing 25 mA from a 2 V power supply. The quadrature phase error between the VCO outputs is at most 0.25/spl deg/.","PeriodicalId":423674,"journal":{"name":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","volume":"122 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-08-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"83","resultStr":"{\"title\":\"A low-phase-noise low-phase-error 1.8 GHz quadrature CMOS VCO\",\"authors\":\"P. Andreani\",\"doi\":\"10.1109/ISSCC.2002.993046\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 1.8 GHz quadrature VCO in standard 0.35 /spl mu/m CMOS with three metal layers shows -140 dBc/Hz or less phase noise across an 18% tuning range, while drawing 25 mA from a 2 V power supply. The quadrature phase error between the VCO outputs is at most 0.25/spl deg/.\",\"PeriodicalId\":423674,\"journal\":{\"name\":\"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)\",\"volume\":\"122 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-08-07\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"83\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.2002.993046\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.2002.993046","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low-phase-noise low-phase-error 1.8 GHz quadrature CMOS VCO
A 1.8 GHz quadrature VCO in standard 0.35 /spl mu/m CMOS with three metal layers shows -140 dBc/Hz or less phase noise across an 18% tuning range, while drawing 25 mA from a 2 V power supply. The quadrature phase error between the VCO outputs is at most 0.25/spl deg/.