H. Rucker, B. Heinemann, R. Barth, D. Bolze, J. Drews, U. Haak, W. Hoppner, D. Knoll, K. Kopke, S. Marschmeyer, H. Richter, P. Schley, D. Schmidt, R. Scholz, B. Tillack, W. Winkler, H. Wulf, Y. Yamamoto
{"title":"SiGe:C BiCMOS技术，具有3.6 ps栅极延迟","authors":"H. Rucker, B. Heinemann, R. Barth, D. Bolze, J. Drews, U. Haak, W. Hoppner, D. Knoll, K. Kopke, S. Marschmeyer, H. Richter, P. Schley, D. Schmidt, R. Scholz, B. Tillack, W. Winkler, H. Wulf, Y. Yamamoto","doi":"10.1109/IEDM.2003.1269180","DOIUrl":null,"url":null,"abstract":"A high-speed SiGe:C HBT technology is presented that combines a new extrinsic base construction with a low-resistance collector design to simultaneously minimize base and collector resistances and base-collector capacitance. A ring oscillator delay of 3.6 ps per stage was achieved. To our knowledge, this is the shortest gate delay reported to date for a SiGe technology. The HBTs demonstrate an f/sub T/ of 190 GHz, an f/sub max/ of 243 GHz, and a BV/sub CEO/ of 1.9 V at an drawn emitter size of 0.175/spl times/0.84 /spl mu/m/sup 2/. The high-speed HBT module has been integrated in a 0.25 /spl mu/m CMOS platform.","PeriodicalId":344286,"journal":{"name":"IEEE International Electron Devices Meeting 2003","volume":"33 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"53","resultStr":"{\"title\":\"SiGe:C BiCMOS technology with 3.6 ps gate delay\",\"authors\":\"H. Rucker, B. Heinemann, R. Barth, D. Bolze, J. Drews, U. Haak, W. Hoppner, D. Knoll, K. Kopke, S. Marschmeyer, H. Richter, P. Schley, D. Schmidt, R. Scholz, B. Tillack, W. Winkler, H. Wulf, Y. Yamamoto\",\"doi\":\"10.1109/IEDM.2003.1269180\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A high-speed SiGe:C HBT technology is presented that combines a new extrinsic base construction with a low-resistance collector design to simultaneously minimize base and collector resistances and base-collector capacitance. A ring oscillator delay of 3.6 ps per stage was achieved. To our knowledge, this is the shortest gate delay reported to date for a SiGe technology. The HBTs demonstrate an f/sub T/ of 190 GHz, an f/sub max/ of 243 GHz, and a BV/sub CEO/ of 1.9 V at an drawn emitter size of 0.175/spl times/0.84 /spl mu/m/sup 2/. The high-speed HBT module has been integrated in a 0.25 /spl mu/m CMOS platform.\",\"PeriodicalId\":344286,\"journal\":{\"name\":\"IEEE International Electron Devices Meeting 2003\",\"volume\":\"33 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-12-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"53\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE International Electron Devices Meeting 2003\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IEDM.2003.1269180\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE International Electron Devices Meeting 2003","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEDM.2003.1269180","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A high-speed SiGe:C HBT technology is presented that combines a new extrinsic base construction with a low-resistance collector design to simultaneously minimize base and collector resistances and base-collector capacitance. A ring oscillator delay of 3.6 ps per stage was achieved. To our knowledge, this is the shortest gate delay reported to date for a SiGe technology. The HBTs demonstrate an f/sub T/ of 190 GHz, an f/sub max/ of 243 GHz, and a BV/sub CEO/ of 1.9 V at an drawn emitter size of 0.175/spl times/0.84 /spl mu/m/sup 2/. The high-speed HBT module has been integrated in a 0.25 /spl mu/m CMOS platform.
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