10.2 A 139µW 104.8dB-DR 24khz - bw CT ΔΣM带斩波ac耦合ota堆叠和FIR dac

Somok Mondal, Omid Ghadami, D. Hall
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引用次数: 11

摘要

连续时间delta-sigma调制器(CT $\Delta \Sigma \mathrm{Ms}$)具有固有的抗混叠,电阻输入和宽松的解决要求,使其在音频应用中很受欢迎。由于第一OTA的带宽相对较低,因此噪声效率对功率和FoM有很大影响。ota堆叠是最近报道的一种技术,可以改善连续时间放大器的噪声-电流权衡[1],[2]。这是所提出的CT $\Delta\Sigma$ M背后的核心思想,其中交流耦合堆叠OTA提高了第一个积分器的噪声效率。具有3堆栈OTA的ADC在24 kHz带宽下实现100.9 dB SNDR和$104.8 \mathrm{dB} \mathrm{DR}$,而最先进的Schreier $FoM _{\mathrm{DR}}$功耗为$139 \mu \mathrm{W}$,为187.2 dB。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
10.2 A 139 µ W 104.8dB-DR 24 kHz-BW CT ΔΣM with Chopped AC-Coupled OTA-Stacking and FIR DACs
Continuous-time delta-sigma modulators (CT $\Delta \Sigma \mathrm{Ms}$) have inherent anti-aliasing, resistive inputs, and relaxed settling requirements making them popular for audio applications. Due to the relatively low bandwidth, the noise-efficiency of the first OTA has a substantial influence on the power and FoM. OTA-stacking is a recently reported technique that improves the noise-current tradeoff in continuous-time amplifiers [1], [2]. This is the central idea behind the proposed CT $\Delta\Sigma$ M where an AC-coupled stacked OTA improves the noise-efficiency of the first integrator. The ADC with a 3-stack OTA achieves 100.9 dB SNDR and $104.8 \mathrm{dB} \mathrm{DR}$ in a 24 kHz bandwidth while consuming $139 \mu \mathrm{W}$ for a state-of-the-art Schreier $FoM _{\mathrm{DR}}$ of 187.2 dB.
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