{"title":"250mA超低差调节器，高摆压率双循环折叠级联误差放大器","authors":"S. Patri, S. Alapati, S. Chowdary, K. Prasad","doi":"10.1109/ISVDAT.2014.6881067","DOIUrl":null,"url":null,"abstract":"This paper presents a modified folded cascode error amplifier of low dropout (LDO) regulator and a compensation scheme to improve the transient response. The proposed error amplifier enhances its transconductance, gain, and slew rate by recycling the shunt current sources of conventional folded cascode amplifier without increasing area or power consumption. The design is implemented in a standard UMC 0.18μm CMOS process. The LDO regulator consumes a quiescent current of 34μAonly. Simulation results show that the overshoot/undershoot in the output voltage under the extreme load transients are 177.7mV/139mVfor load current range of 0.5mA to 250mA with an output capacitor of 1pF. The LDO presented is useful for chip level power management suitable for SoC applications.","PeriodicalId":217280,"journal":{"name":"18th International Symposium on VLSI Design and Test","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-07-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"250mA ultra low drop out regulator with high slew rate double recycling folded cascode error amplifier\",\"authors\":\"S. Patri, S. Alapati, S. Chowdary, K. Prasad\",\"doi\":\"10.1109/ISVDAT.2014.6881067\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a modified folded cascode error amplifier of low dropout (LDO) regulator and a compensation scheme to improve the transient response. The proposed error amplifier enhances its transconductance, gain, and slew rate by recycling the shunt current sources of conventional folded cascode amplifier without increasing area or power consumption. The design is implemented in a standard UMC 0.18μm CMOS process. The LDO regulator consumes a quiescent current of 34μAonly. Simulation results show that the overshoot/undershoot in the output voltage under the extreme load transients are 177.7mV/139mVfor load current range of 0.5mA to 250mA with an output capacitor of 1pF. The LDO presented is useful for chip level power management suitable for SoC applications.\",\"PeriodicalId\":217280,\"journal\":{\"name\":\"18th International Symposium on VLSI Design and Test\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-07-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"18th International Symposium on VLSI Design and Test\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISVDAT.2014.6881067\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"18th International Symposium on VLSI Design and Test","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVDAT.2014.6881067","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
250mA ultra low drop out regulator with high slew rate double recycling folded cascode error amplifier
This paper presents a modified folded cascode error amplifier of low dropout (LDO) regulator and a compensation scheme to improve the transient response. The proposed error amplifier enhances its transconductance, gain, and slew rate by recycling the shunt current sources of conventional folded cascode amplifier without increasing area or power consumption. The design is implemented in a standard UMC 0.18μm CMOS process. The LDO regulator consumes a quiescent current of 34μAonly. Simulation results show that the overshoot/undershoot in the output voltage under the extreme load transients are 177.7mV/139mVfor load current range of 0.5mA to 250mA with an output capacitor of 1pF. The LDO presented is useful for chip level power management suitable for SoC applications.
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