8mW超低功耗60GHz直接转换接收机，增益55dB，噪声系数4.9dB，采用65nm CMOS

2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT) Pub Date : 2012-11-01 DOI:10.1109/RFIT.2012.6401609

Y. Shang, Deyun Cai, Wei Fei, Hao Yu, Junyan Ren

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引用次数: 11

摘要

在65nm CMOS工艺中，展示了一种用于v波段60GHz应用的超低功耗直接转换接收器。低功耗低噪声放大器(LNA)、跨导混频器和可变增益放大器(VGA)的设计显著降低了功耗。为了减小跨导混频器的功率和面积，研制了一种紧凑的正交混合耦合器。所设计的接收机(芯片面积0.34mm2)功率为8mW，最小单边带(SSB)噪声系数(NF)为4.9dB，最大功率转换增益为55dB。

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An 8mW ultra low power 60GHz direct-conversion receiver with 55dB gain and 4.9dB noise figure in 65nm CMOS

An ultra low power direct-conversion receiver is demonstrated for V-band 60GHz applications in 65nm CMOS process. The power consumption is significantly reduced by the design of low-power low noise amplifier (LNA), transconductance mixer and variable gain amplifier (VGA). A compact quadrature-hybrid coupler is developed for transconductance mixer for the reduction of both power and area. The proposed receiver (0.34mm2 chip area) is measured with 8mW power, the minimum single-side-band (SSB) noise figure (NF) of 4.9dB, and the maximum power conversion gain of 55dB.

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2012 IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)

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