{"title":"用于牵引应用的高密度200kw全碳化硅三相逆变器","authors":"Ahmad Al-Hmoud, Ahmed H. Ismail, Yue Zhao","doi":"10.1109/APEC43580.2023.10131309","DOIUrl":null,"url":null,"abstract":"This work presents the design and development of a high density 200-kW three-phase inverter for traction applications with elevated DC bus voltage, e.g., up to 1.2 kV. A state-of-the-art six-pack 1.7-kV silicon carbide (SiC) power module is used in this design. To achieve a compact system integration and ultra-low power loop inductance, the custom laminated bussing structure is optimized with the detailed design along the method of estimating the parasitic inductance presented in this work. The designs of other key components, such as a compact six-channel gate driver board, are also presented. The inverter prototype was tested at different switching frequencies and dead times to investigate their effect on the performance. The inverter achieved a peak efficiency of 99.3% at 10kHz, and a 43kW/L power density.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A High-Density 200-kW All Silicon Carbide Three-Phase Inverter for Traction Applications\",\"authors\":\"Ahmad Al-Hmoud, Ahmed H. Ismail, Yue Zhao\",\"doi\":\"10.1109/APEC43580.2023.10131309\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This work presents the design and development of a high density 200-kW three-phase inverter for traction applications with elevated DC bus voltage, e.g., up to 1.2 kV. A state-of-the-art six-pack 1.7-kV silicon carbide (SiC) power module is used in this design. To achieve a compact system integration and ultra-low power loop inductance, the custom laminated bussing structure is optimized with the detailed design along the method of estimating the parasitic inductance presented in this work. The designs of other key components, such as a compact six-channel gate driver board, are also presented. The inverter prototype was tested at different switching frequencies and dead times to investigate their effect on the performance. The inverter achieved a peak efficiency of 99.3% at 10kHz, and a 43kW/L power density.\",\"PeriodicalId\":151216,\"journal\":{\"name\":\"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)\",\"volume\":\"8 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-03-19\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APEC43580.2023.10131309\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APEC43580.2023.10131309","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A High-Density 200-kW All Silicon Carbide Three-Phase Inverter for Traction Applications
This work presents the design and development of a high density 200-kW three-phase inverter for traction applications with elevated DC bus voltage, e.g., up to 1.2 kV. A state-of-the-art six-pack 1.7-kV silicon carbide (SiC) power module is used in this design. To achieve a compact system integration and ultra-low power loop inductance, the custom laminated bussing structure is optimized with the detailed design along the method of estimating the parasitic inductance presented in this work. The designs of other key components, such as a compact six-channel gate driver board, are also presented. The inverter prototype was tested at different switching frequencies and dead times to investigate their effect on the performance. The inverter achieved a peak efficiency of 99.3% at 10kHz, and a 43kW/L power density.