R. Kochan, V. Kochan, A. Sachenko, I. Maykiv, I. Turchenko, G. Markowsky
{"title":"基于FPGA的网络应用处理器","authors":"R. Kochan, V. Kochan, A. Sachenko, I. Maykiv, I. Turchenko, G. Markowsky","doi":"10.1109/IMTC.2005.1604245","DOIUrl":null,"url":null,"abstract":"This paper presents the development of a network capable application processor (NCAP) compatible with the IEEE1451 standard. Its features are an online, remote, real-time reprogramming mode and support of high-speed interfaces. The high-speed interfaces are implemented using a FPGA (field-programmable gate array). A novel design using a configuration controller and a FPGA provides robust interfaces and efficient FPGA usage. This paper also describes how our NCAP prototype can be used in an intelligent security system","PeriodicalId":244878,"journal":{"name":"2005 IEEE Instrumentationand Measurement Technology Conference Proceedings","volume":"106 4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Network Capable Application Processor Based on a FPGA\",\"authors\":\"R. Kochan, V. Kochan, A. Sachenko, I. Maykiv, I. Turchenko, G. Markowsky\",\"doi\":\"10.1109/IMTC.2005.1604245\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the development of a network capable application processor (NCAP) compatible with the IEEE1451 standard. Its features are an online, remote, real-time reprogramming mode and support of high-speed interfaces. The high-speed interfaces are implemented using a FPGA (field-programmable gate array). A novel design using a configuration controller and a FPGA provides robust interfaces and efficient FPGA usage. This paper also describes how our NCAP prototype can be used in an intelligent security system\",\"PeriodicalId\":244878,\"journal\":{\"name\":\"2005 IEEE Instrumentationand Measurement Technology Conference Proceedings\",\"volume\":\"106 4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2005-05-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2005 IEEE Instrumentationand Measurement Technology Conference Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IMTC.2005.1604245\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2005 IEEE Instrumentationand Measurement Technology Conference Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMTC.2005.1604245","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Network Capable Application Processor Based on a FPGA
This paper presents the development of a network capable application processor (NCAP) compatible with the IEEE1451 standard. Its features are an online, remote, real-time reprogramming mode and support of high-speed interfaces. The high-speed interfaces are implemented using a FPGA (field-programmable gate array). A novel design using a configuration controller and a FPGA provides robust interfaces and efficient FPGA usage. This paper also describes how our NCAP prototype can be used in an intelligent security system
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