基于雏菊链的PIM异构集成平台2.5D大规模中间商键合过程验证

2023 International Conference on Electronics, Information, and Communication (ICEIC) Pub Date : 2023-02-05 DOI:10.1109/ICEIC57457.2023.10049851

Sujin Park, Yi-Gyeong Kim, Young-Deuk Jeon, Min-Hyung Cho, Jinho Han, Youngsu Kwon

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引用次数: 0

摘要

针对PIM异构集成平台，提出了一种基于菊花链(DC)的2.5D大规模中间体连接过程验证方法。目标平台由8个高带宽存储器(HBMs)、2个npu、一个RDL中间层和一个衬底组成。为了验证键合工艺的可行性，设计了具有48μm×55μm网格μ凸点的NPU直流芯片，并在边缘和角处设计了环形直流。此外，HBM PHY的直流模式和模对模连接逐行实现，以检查高密度电线连接区域，该区域具有偏移量以最小化对角连接。对于具有192μm×220μm网格C4-bump和具有1mm×1mm BGA球的衬底，不仅配置IN/OUT引脚，还配置dc。大规模网络列表是通过将视点统一到底视图来实现的。结合工艺验证可以通过优化放置来提高2.5D平台的成本效率和live interposer的性能。

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2.5D Large-Scale Interposer Bonding Process Verification using Daisy-Chain for PIM Heterogeneous Integration Platform

This paper describes a 2.5D large-scale interposer bonding process verification method using a daisy chain (DC) for PIM heterogeneous integration platform. The target platform is composed of 8 high bandwidth memories (HBMs), 2 NPUs, an RDL interposer, and a substrate. To check the feasibility of the bonding process, NPU DC die having 48μm×55μm grid μ-bump is designed with a ring-shaped DC at the edge and corner. In addition, the DC pattern for HBM PHY and the die-to-die connection is implemented line-by-line to check the high-density wire connection area which has an offset to minimize the diagonal connection. For the interposer having 192μm×220μm gird C4-bump and the substrate having 1mm×1mm BGA ball, not only IN/OUT pins but also DCs are configured. The large-scale netlists are implemented by unifying the viewpoint to the bottom view. The bonding process verification could improve the cost efficiency of the 2.5D platform and the performance of the live interposer by optimizing the placement.

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2023 International Conference on Electronics, Information, and Communication (ICEIC)

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