一种用于DTCNN实现与应用的可调重硬件加速板

1996 Fourth IEEE International Workshop on Cellular Neural Networks and their Applications Proceedings (CNNA-96) Pub Date : 1996-06-24 DOI:10.1109/CNNA.1996.566564

Liming Zhang, Wei Wang, K. Jiang

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引用次数: 1

摘要

介绍了一种只用比较和匹配电路实现神经网络的新方法。提出了一种结合FPGA的数字加速板，用于模拟离散时间细胞神经元的行为。通过上位机，可以在硬件上几乎任意地修改连接权值。在权值满足一定条件的情况下，网络可以实现各种功能。实验表明，计算速度比软件实现快70-1000倍。最后，以手写体字符识别系统为例，说明了该方法的硬件效率和低成本。

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A weight-adjustable hardware accelerator board for DTCNN implementation and application

A new method which uses only comparison and matching circuits to implement the neural net is introduced. The digital accelerator board combined with FPGA for simulating the behavior of discrete-time cellular neurons is presented in this paper. Via host computer the connected-weights can be modified in the hardware nearly arbitrarily. The network can realize various functions if the weights satisfy some conditions. The experiments show that the computation speed exceeds software implementation by 70-1000 limes. Finally, an application of feature extraction on handwritten characters recognition system shows the efficiency of the hardware with low cost.

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来源期刊

1996 Fourth IEEE International Workshop on Cellular Neural Networks and their Applications Proceedings (CNNA-96)

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