基于VLSI的电池供电数字助听器设计

ICASSP-88., International Conference on Acoustics, Speech, and Signal Processing Pub Date : 1988-04-11 DOI:10.1109/ICASSP.1988.197154

R. Morley, G. Engel, T. J. Sullivan, Sundaram M. Natarajan

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引用次数: 19

摘要

提出了一种双芯片设计，其中一个芯片负责数据采集和重构，而第二个芯片专用于数字信号处理电路。提出了一种定制的数字信号处理器，每秒可能能够执行超过3*10/sup / 6/乘法累积操作，同时消耗不到一小部分毫瓦，这是实现四通道助听器所需的。通过使用符号/对数算法，在保持宽动态范围的同时，最大限度地降低了功耗。

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VLSI based design of a battery-operated digital hearing aid

A two-chip design is proposed wherein one chip is responsible for data acquisition and reconstruction while a second chip is dedicated to the digital signal-processing circuitry. A custom digital signal processor, potentially capable of performing over 3*10/sup 6/ multiply accumulate operations per second while consuming less than a fraction of a milliwatt, that is required to implement a four-channel hearing aid, is presented. Power consumption is minimized while maintaining a wide dynamic range through the use of sign/logarithm arithmetic.<>

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ICASSP-88., International Conference on Acoustics, Speech, and Signal Processing

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