{"title":"模集{22n+1-1,22n,2n-1}的残二变换器","authors":"K. Gbolagade, R. Chaves, L. Sousa, S. Cotofana","doi":"10.1109/ICASTECH.2009.5409752","DOIUrl":null,"url":null,"abstract":"In this paper, we propose two memoryless converters for the moduli set {22n+1 -1,22n,2n -1}. First, we propose a novel reverse converter, which is purely adder based, using the traditional Chinese Remainder Theorem (CRT). Second, due to the fact that the proposed CRT based structure does not cover the entire dynamic range, a second converter, which covers the entire dynamic range based on Mixed Radix Conversion (MRC), is proposed. The CRT based converter outperforms the MRC based converter both in terms of area and delay. In comparison with related best known state of the art converters, they are all outperformed by the proposed CRT based scheme in terms of both area cost and conversion delay. The theoretical evaluation is supported by the experimental results, which are estimated on a Standard Cell 0.13-µm CMOS technology. These experimental results indicate that, on average, for the same dynamic range, the proposed CRT based converter achieves about 23% delay reduction with more than 3% area reduction, when compared to the existing state of the art MRC based converter. Additionally, the proposed CRT based converter is about 6% faster with about 4% area reduction when compared with the existing CRT based converter.","PeriodicalId":163141,"journal":{"name":"2009 2nd International Conference on Adaptive Science & Technology (ICAST)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"Residue-to-binary converters for the moduli set {22n+1-1,22n,2n-1}\",\"authors\":\"K. Gbolagade, R. Chaves, L. Sousa, S. Cotofana\",\"doi\":\"10.1109/ICASTECH.2009.5409752\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, we propose two memoryless converters for the moduli set {22n+1 -1,22n,2n -1}. First, we propose a novel reverse converter, which is purely adder based, using the traditional Chinese Remainder Theorem (CRT). Second, due to the fact that the proposed CRT based structure does not cover the entire dynamic range, a second converter, which covers the entire dynamic range based on Mixed Radix Conversion (MRC), is proposed. The CRT based converter outperforms the MRC based converter both in terms of area and delay. In comparison with related best known state of the art converters, they are all outperformed by the proposed CRT based scheme in terms of both area cost and conversion delay. The theoretical evaluation is supported by the experimental results, which are estimated on a Standard Cell 0.13-µm CMOS technology. These experimental results indicate that, on average, for the same dynamic range, the proposed CRT based converter achieves about 23% delay reduction with more than 3% area reduction, when compared to the existing state of the art MRC based converter. Additionally, the proposed CRT based converter is about 6% faster with about 4% area reduction when compared with the existing CRT based converter.\",\"PeriodicalId\":163141,\"journal\":{\"name\":\"2009 2nd International Conference on Adaptive Science & Technology (ICAST)\",\"volume\":\"46 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2009 2nd International Conference on Adaptive Science & Technology (ICAST)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICASTECH.2009.5409752\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2009 2nd International Conference on Adaptive Science & Technology (ICAST)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICASTECH.2009.5409752","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Residue-to-binary converters for the moduli set {22n+1-1,22n,2n-1}
In this paper, we propose two memoryless converters for the moduli set {22n+1 -1,22n,2n -1}. First, we propose a novel reverse converter, which is purely adder based, using the traditional Chinese Remainder Theorem (CRT). Second, due to the fact that the proposed CRT based structure does not cover the entire dynamic range, a second converter, which covers the entire dynamic range based on Mixed Radix Conversion (MRC), is proposed. The CRT based converter outperforms the MRC based converter both in terms of area and delay. In comparison with related best known state of the art converters, they are all outperformed by the proposed CRT based scheme in terms of both area cost and conversion delay. The theoretical evaluation is supported by the experimental results, which are estimated on a Standard Cell 0.13-µm CMOS technology. These experimental results indicate that, on average, for the same dynamic range, the proposed CRT based converter achieves about 23% delay reduction with more than 3% area reduction, when compared to the existing state of the art MRC based converter. Additionally, the proposed CRT based converter is about 6% faster with about 4% area reduction when compared with the existing CRT based converter.