一种7.0-8.0 GHz高效中功率放大器设计及三维有限元建模

2019 IEEE 4th Advanced Information Technology, Electronic and Automation Control Conference (IAEAC) Pub Date : 2019-12-01 DOI:10.1109/IAEAC47372.2019.8997641

Q. Lin, Si-wei Chen, Haifeng Wu, Dan-hui Hu, Liu-lin Hu, Xiao-Ming Zhang

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引用次数: 1

摘要

提出了一种采用0.15 μm GaAs pHEMT工艺的7.0 GHz ~ 8.0 GHz中功率放大器。为了实现宽带高增益和高效率，该放大器采用两级拓扑结构和两串LC输出匹配网络，目标是在所需带宽上实现最佳效率阻抗。为了实现本设计的有限元分析，提出了一种手工建模的方法，在ANSYS WORKBENCH中生成PA的三维模型。测量结果表明，该放大器在7.0 GHz ~ 8.0 GHz范围内实现了26 ~ 27 dB的小信号增益，饱和输出功率约为25 dBm, PAE为47%。

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A 7.0–8.0 GHz High Efficiency Medium Power Amplifier Design and 3-D Modeling for FEA

This paper presents a 7.0 GHz to 8.0 GHz medium power amplifier (PA) using a 0.15-μm GaAs pHEMT process. To achieve the wideband high gain and high efficiency, the proposed PA applies a two-stage topology and two series LC output matching network targeting the optimum efficiency impedances over the desired bandwidth. To implement the finite element analysis for this design, a manual modeling method is proposed to generate the 3-D model of the PA in ANSYS WORKBENCH. Measurement results show that the PA achieves a small-signal gain of 26-27 dB, a saturated output power of about 25 dBm with PAE of 47% from 7.0 GHz to 8.0 GHz.

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来源期刊

2019 IEEE 4th Advanced Information Technology, Electronic and Automation Control Conference (IAEAC)

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