{"title":"用于并行光互连的12通道2.5 Gb/s接收IC","authors":"B. Mayampurath, A. Wu, A. Armstrong","doi":"10.1109/GAAS.2001.964346","DOIUrl":null,"url":null,"abstract":"A 12-channel, 2.5 Gb/s, receiver IC for parallel optical interconnect is described. Each channel contains a Metal-Semiconductor-Metal Photodetector (MSM PD), Transimpedance Amplifier (TIA), Limiting Amplifier (LA), Output Buffer (OB) and Loss of Signal Detector (LOS). The chip was designed and fabricated in a 0.4 /spl mu/m GaAs MESFET process. Using a 3.3 V power supply, the chip typically consumes 600 mA, and each channel provides 400 mV differential outputs for input optical power more than -20 dBm. Typical single channel sensitivity is -19.5 dBm. Details of the chip design and layout and measured results are presented.","PeriodicalId":269944,"journal":{"name":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 23rd Annual Technical Digest 2001 (Cat. No.01CH37191)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2001-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A 12-channel 2.5 Gb/s receiver IC for parallel optical interconnect\",\"authors\":\"B. Mayampurath, A. Wu, A. Armstrong\",\"doi\":\"10.1109/GAAS.2001.964346\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A 12-channel, 2.5 Gb/s, receiver IC for parallel optical interconnect is described. Each channel contains a Metal-Semiconductor-Metal Photodetector (MSM PD), Transimpedance Amplifier (TIA), Limiting Amplifier (LA), Output Buffer (OB) and Loss of Signal Detector (LOS). The chip was designed and fabricated in a 0.4 /spl mu/m GaAs MESFET process. Using a 3.3 V power supply, the chip typically consumes 600 mA, and each channel provides 400 mV differential outputs for input optical power more than -20 dBm. Typical single channel sensitivity is -19.5 dBm. Details of the chip design and layout and measured results are presented.\",\"PeriodicalId\":269944,\"journal\":{\"name\":\"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 23rd Annual Technical Digest 2001 (Cat. No.01CH37191)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2001-10-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 23rd Annual Technical Digest 2001 (Cat. No.01CH37191)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GAAS.2001.964346\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 23rd Annual Technical Digest 2001 (Cat. No.01CH37191)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GAAS.2001.964346","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 12-channel 2.5 Gb/s receiver IC for parallel optical interconnect
A 12-channel, 2.5 Gb/s, receiver IC for parallel optical interconnect is described. Each channel contains a Metal-Semiconductor-Metal Photodetector (MSM PD), Transimpedance Amplifier (TIA), Limiting Amplifier (LA), Output Buffer (OB) and Loss of Signal Detector (LOS). The chip was designed and fabricated in a 0.4 /spl mu/m GaAs MESFET process. Using a 3.3 V power supply, the chip typically consumes 600 mA, and each channel provides 400 mV differential outputs for input optical power more than -20 dBm. Typical single channel sensitivity is -19.5 dBm. Details of the chip design and layout and measured results are presented.
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