{"title":"使用应用签名检测并行应用中策略映射产生的低效率","authors":"C. Rangel, Alvaro Wong, Dolores Rexachs, E. Luque","doi":"10.1109/HPCS.2017.85","DOIUrl":null,"url":null,"abstract":"The execution of HPC applications in multicore environments can occasionally use the resources in an inefficient way. There are idle times during the application execution that can be caused by synchronization or message passing collisions. We define this idle time as an application inefficiency and may be caused by the message passing collisions at different types of interconnections in the compute nodes. We propose a methodology to characterize the application's execution in order to analyze and detect these inefficiencies in a bounded time as well as to locate on which parallel segments of the application code (phases) these inefficiencies are generated. The parallel segments of code (phases) represent the most relevant application behavior and are obtained by the application's characterization using the PAS2P tool. The tool allows us to predict the execution time by the generation of the application signature, which is composed of phases. Taking advantage of the prediction quality and the time to obtain the prediction of application performance, we propose modeling the factors that potentially influence the application's execution time, especially characterizing the behavior during the execution time of these phases. We performed experimental validation using signatures of NAS Parallel benchmarks in order to detect and model the inefficiencies in the application phases.","PeriodicalId":115758,"journal":{"name":"2017 International Conference on High Performance Computing & Simulation (HPCS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Using the Application Signature to Detect Inefficiencies Generated by Mapping Policies in Parallel Applications\",\"authors\":\"C. Rangel, Alvaro Wong, Dolores Rexachs, E. Luque\",\"doi\":\"10.1109/HPCS.2017.85\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The execution of HPC applications in multicore environments can occasionally use the resources in an inefficient way. There are idle times during the application execution that can be caused by synchronization or message passing collisions. We define this idle time as an application inefficiency and may be caused by the message passing collisions at different types of interconnections in the compute nodes. We propose a methodology to characterize the application's execution in order to analyze and detect these inefficiencies in a bounded time as well as to locate on which parallel segments of the application code (phases) these inefficiencies are generated. The parallel segments of code (phases) represent the most relevant application behavior and are obtained by the application's characterization using the PAS2P tool. The tool allows us to predict the execution time by the generation of the application signature, which is composed of phases. Taking advantage of the prediction quality and the time to obtain the prediction of application performance, we propose modeling the factors that potentially influence the application's execution time, especially characterizing the behavior during the execution time of these phases. We performed experimental validation using signatures of NAS Parallel benchmarks in order to detect and model the inefficiencies in the application phases.\",\"PeriodicalId\":115758,\"journal\":{\"name\":\"2017 International Conference on High Performance Computing & Simulation (HPCS)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 International Conference on High Performance Computing & Simulation (HPCS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HPCS.2017.85\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 International Conference on High Performance Computing & Simulation (HPCS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HPCS.2017.85","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Using the Application Signature to Detect Inefficiencies Generated by Mapping Policies in Parallel Applications
The execution of HPC applications in multicore environments can occasionally use the resources in an inefficient way. There are idle times during the application execution that can be caused by synchronization or message passing collisions. We define this idle time as an application inefficiency and may be caused by the message passing collisions at different types of interconnections in the compute nodes. We propose a methodology to characterize the application's execution in order to analyze and detect these inefficiencies in a bounded time as well as to locate on which parallel segments of the application code (phases) these inefficiencies are generated. The parallel segments of code (phases) represent the most relevant application behavior and are obtained by the application's characterization using the PAS2P tool. The tool allows us to predict the execution time by the generation of the application signature, which is composed of phases. Taking advantage of the prediction quality and the time to obtain the prediction of application performance, we propose modeling the factors that potentially influence the application's execution time, especially characterizing the behavior during the execution time of these phases. We performed experimental validation using signatures of NAS Parallel benchmarks in order to detect and model the inefficiencies in the application phases.