Dina M. Ellaithy, M. El-Moursy, G. H. Ibrahim, Amal Zaki, A. Zekry
{"title":"GPU双对数运算技术","authors":"Dina M. Ellaithy, M. El-Moursy, G. H. Ibrahim, Amal Zaki, A. Zekry","doi":"10.1109/ICCES.2017.8275335","DOIUrl":null,"url":null,"abstract":"An efficient manipulation of the logarithmic number system (LNS) is proposed resulting in saving in power and area of graphical processing unit (GPU). Double Logarithmic Arithmetic (DLA) approach is presented to achieve low power applications. The proposed scheme exploits the logarithmic field and enhances the computation of the transcendental operations and the lighting pattern operations for energy and area efficiency. The DLA is exploited by means of cascading logarithmic converters to completely eliminate multipliers. Comparison results show that this work achieves up to 51% saving in power and 40% area reduction as compared to the current schemes. The proposed methodology can implement all the transcendental processes utilizing multiplier-free hardware structural.","PeriodicalId":170532,"journal":{"name":"2017 12th International Conference on Computer Engineering and Systems (ICCES)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Double logarithmic arithmetic technique for GPU\",\"authors\":\"Dina M. Ellaithy, M. El-Moursy, G. H. Ibrahim, Amal Zaki, A. Zekry\",\"doi\":\"10.1109/ICCES.2017.8275335\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An efficient manipulation of the logarithmic number system (LNS) is proposed resulting in saving in power and area of graphical processing unit (GPU). Double Logarithmic Arithmetic (DLA) approach is presented to achieve low power applications. The proposed scheme exploits the logarithmic field and enhances the computation of the transcendental operations and the lighting pattern operations for energy and area efficiency. The DLA is exploited by means of cascading logarithmic converters to completely eliminate multipliers. Comparison results show that this work achieves up to 51% saving in power and 40% area reduction as compared to the current schemes. The proposed methodology can implement all the transcendental processes utilizing multiplier-free hardware structural.\",\"PeriodicalId\":170532,\"journal\":{\"name\":\"2017 12th International Conference on Computer Engineering and Systems (ICCES)\",\"volume\":\"32 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 12th International Conference on Computer Engineering and Systems (ICCES)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCES.2017.8275335\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 12th International Conference on Computer Engineering and Systems (ICCES)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCES.2017.8275335","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
An efficient manipulation of the logarithmic number system (LNS) is proposed resulting in saving in power and area of graphical processing unit (GPU). Double Logarithmic Arithmetic (DLA) approach is presented to achieve low power applications. The proposed scheme exploits the logarithmic field and enhances the computation of the transcendental operations and the lighting pattern operations for energy and area efficiency. The DLA is exploited by means of cascading logarithmic converters to completely eliminate multipliers. Comparison results show that this work achieves up to 51% saving in power and 40% area reduction as compared to the current schemes. The proposed methodology can implement all the transcendental processes utilizing multiplier-free hardware structural.