{"title":"蜂窝apap和fpapap的CMOS设计:概述","authors":"A. Rdriguez-Vazquez","doi":"10.1109/CNNA.2002.1035088","DOIUrl":null,"url":null,"abstract":"CNN-based analog visual microprocessors have similarities with the so-called Single Instruction Multiple Data systems, although they work directly on analog signal representations obtained through embedded optical sensors and hence do not need a frontend sensory plane or analog-to-digital converters. The architecture of these visual microprocessors is illustrated in the paper through two prototype chips, namely: ACE4K and ACE16K. In both cases, as in other related chips the architecture includes a core array of interconnected elementary processing units, surrounded by a global circuitry.","PeriodicalId":387716,"journal":{"name":"Proceedings of the 2002 7th IEEE International Workshop on Cellular Neural Networks and Their Applications","volume":"63 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-07-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"CMOS design of cellular APAPs and FPAPAPs: an overview\",\"authors\":\"A. Rdriguez-Vazquez\",\"doi\":\"10.1109/CNNA.2002.1035088\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"CNN-based analog visual microprocessors have similarities with the so-called Single Instruction Multiple Data systems, although they work directly on analog signal representations obtained through embedded optical sensors and hence do not need a frontend sensory plane or analog-to-digital converters. The architecture of these visual microprocessors is illustrated in the paper through two prototype chips, namely: ACE4K and ACE16K. In both cases, as in other related chips the architecture includes a core array of interconnected elementary processing units, surrounded by a global circuitry.\",\"PeriodicalId\":387716,\"journal\":{\"name\":\"Proceedings of the 2002 7th IEEE International Workshop on Cellular Neural Networks and Their Applications\",\"volume\":\"63 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2002-07-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2002 7th IEEE International Workshop on Cellular Neural Networks and Their Applications\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CNNA.2002.1035088\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2002 7th IEEE International Workshop on Cellular Neural Networks and Their Applications","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CNNA.2002.1035088","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
CMOS design of cellular APAPs and FPAPAPs: an overview
CNN-based analog visual microprocessors have similarities with the so-called Single Instruction Multiple Data systems, although they work directly on analog signal representations obtained through embedded optical sensors and hence do not need a frontend sensory plane or analog-to-digital converters. The architecture of these visual microprocessors is illustrated in the paper through two prototype chips, namely: ACE4K and ACE16K. In both cases, as in other related chips the architecture includes a core array of interconnected elementary processing units, surrounded by a global circuitry.