在嵌入式系统中防止内存窥探的缓存锁定和加密

Jason DeJesus, J. Chandy
{"title":"在嵌入式系统中防止内存窥探的缓存锁定和加密","authors":"Jason DeJesus, J. Chandy","doi":"10.1109/DSC54232.2022.9888802","DOIUrl":null,"url":null,"abstract":"Embedded systems are designed to have security measures in place that protect users' data from software and network attacks, but these measures can prove useless when the attacker gains physical access to the system. Research has shown that dynamic random access memory (DRAM) is vulnerable to attacks that take advantage of its remanence property where data remains in DRAM shortly after the system is powered off. In this paper, we propose a method utilizing both cache locking and encryption to secure the DRAM on any embedded system by modifying the cache architecture of the CPU. We demonstrate an implementation using a MicroBlaze CPU, but the design can be used with any FPGA soft-core CPU, even if it does not have pre-existing cache locking capabilities. The cache modifications introduce almost no impact on performance and minimal extra hardware utilization.","PeriodicalId":368903,"journal":{"name":"2022 IEEE Conference on Dependable and Secure Computing (DSC)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Cache Locking and Encryption to Prevent Memory Snooping in Embedded Systems\",\"authors\":\"Jason DeJesus, J. Chandy\",\"doi\":\"10.1109/DSC54232.2022.9888802\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Embedded systems are designed to have security measures in place that protect users' data from software and network attacks, but these measures can prove useless when the attacker gains physical access to the system. Research has shown that dynamic random access memory (DRAM) is vulnerable to attacks that take advantage of its remanence property where data remains in DRAM shortly after the system is powered off. In this paper, we propose a method utilizing both cache locking and encryption to secure the DRAM on any embedded system by modifying the cache architecture of the CPU. We demonstrate an implementation using a MicroBlaze CPU, but the design can be used with any FPGA soft-core CPU, even if it does not have pre-existing cache locking capabilities. The cache modifications introduce almost no impact on performance and minimal extra hardware utilization.\",\"PeriodicalId\":368903,\"journal\":{\"name\":\"2022 IEEE Conference on Dependable and Secure Computing (DSC)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-22\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Conference on Dependable and Secure Computing (DSC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DSC54232.2022.9888802\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Conference on Dependable and Secure Computing (DSC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DSC54232.2022.9888802","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

嵌入式系统被设计为具有适当的安全措施,以保护用户的数据免受软件和网络攻击,但是当攻击者获得对系统的物理访问权限时,这些措施可能被证明是无用的。研究表明,动态随机存取存储器(DRAM)很容易受到利用其残余特性的攻击,即在系统断电后不久,数据仍保留在DRAM中。在本文中,我们提出了一种利用缓存锁定和加密的方法,通过修改CPU的缓存架构来保护任何嵌入式系统上的DRAM。我们演示了使用MicroBlaze CPU的实现,但该设计可以与任何FPGA软核CPU一起使用,即使它没有预先存在的缓存锁定功能。缓存修改几乎不会对性能产生任何影响,而且额外的硬件利用率也很少。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Cache Locking and Encryption to Prevent Memory Snooping in Embedded Systems
Embedded systems are designed to have security measures in place that protect users' data from software and network attacks, but these measures can prove useless when the attacker gains physical access to the system. Research has shown that dynamic random access memory (DRAM) is vulnerable to attacks that take advantage of its remanence property where data remains in DRAM shortly after the system is powered off. In this paper, we propose a method utilizing both cache locking and encryption to secure the DRAM on any embedded system by modifying the cache architecture of the CPU. We demonstrate an implementation using a MicroBlaze CPU, but the design can be used with any FPGA soft-core CPU, even if it does not have pre-existing cache locking capabilities. The cache modifications introduce almost no impact on performance and minimal extra hardware utilization.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信