K. M. Z. Rahman, Md. Akhter Uz Zaman, Sunjida Sultana, Md. Soyaeb Hasan, Shahriar Bin Salim, Wasi Mashrur, Md. Rafiqul Islam
{"title":"嵌入式栅极金属对GaAs基DG-JLMOSFET性能分析的影响","authors":"K. M. Z. Rahman, Md. Akhter Uz Zaman, Sunjida Sultana, Md. Soyaeb Hasan, Shahriar Bin Salim, Wasi Mashrur, Md. Rafiqul Islam","doi":"10.1109/ECCE57851.2023.10101640","DOIUrl":null,"url":null,"abstract":"The impact of recessed gate metal on the performance of double-gate junctionless MOSFET (DG-JLMOSFET) has been studied considering GaAs as channel material. The geometry of the gate metal is changed to obtain the best performance by recessing it to gate oxide for 1 nm vertically and extending it up to 9 nm horizontally on both sides. Changing the gate's geometrical shape and physical dimension, the leakage current is found to be reduced significantly for a fixed channel length of 10 nm. This results in a higher ION/IoFF ratio of ~ 1010 which in turn mitigates the drain induced barrier lowering (DIBL). The calculated results on various short channel effects (SCEs) indicate that the proposed model seems to have a greater drain current and a decreased subthreshold swing (SS) of 71 mV/Dec. The results of various figure of merits (FOMs) show that GaAs-based recessed gate DG-JLMOSFETs are extremely viable for the advancement of the upcoming nano-technology.","PeriodicalId":131537,"journal":{"name":"2023 International Conference on Electrical, Computer and Communication Engineering (ECCE)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-02-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Effect of Recessed Gate Metal on Performance Analysis of GaAs Based DG-JLMOSFET\",\"authors\":\"K. M. Z. Rahman, Md. Akhter Uz Zaman, Sunjida Sultana, Md. Soyaeb Hasan, Shahriar Bin Salim, Wasi Mashrur, Md. Rafiqul Islam\",\"doi\":\"10.1109/ECCE57851.2023.10101640\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The impact of recessed gate metal on the performance of double-gate junctionless MOSFET (DG-JLMOSFET) has been studied considering GaAs as channel material. The geometry of the gate metal is changed to obtain the best performance by recessing it to gate oxide for 1 nm vertically and extending it up to 9 nm horizontally on both sides. Changing the gate's geometrical shape and physical dimension, the leakage current is found to be reduced significantly for a fixed channel length of 10 nm. This results in a higher ION/IoFF ratio of ~ 1010 which in turn mitigates the drain induced barrier lowering (DIBL). The calculated results on various short channel effects (SCEs) indicate that the proposed model seems to have a greater drain current and a decreased subthreshold swing (SS) of 71 mV/Dec. The results of various figure of merits (FOMs) show that GaAs-based recessed gate DG-JLMOSFETs are extremely viable for the advancement of the upcoming nano-technology.\",\"PeriodicalId\":131537,\"journal\":{\"name\":\"2023 International Conference on Electrical, Computer and Communication Engineering (ECCE)\",\"volume\":\"50 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-02-23\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2023 International Conference on Electrical, Computer and Communication Engineering (ECCE)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECCE57851.2023.10101640\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 International Conference on Electrical, Computer and Communication Engineering (ECCE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCE57851.2023.10101640","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Effect of Recessed Gate Metal on Performance Analysis of GaAs Based DG-JLMOSFET
The impact of recessed gate metal on the performance of double-gate junctionless MOSFET (DG-JLMOSFET) has been studied considering GaAs as channel material. The geometry of the gate metal is changed to obtain the best performance by recessing it to gate oxide for 1 nm vertically and extending it up to 9 nm horizontally on both sides. Changing the gate's geometrical shape and physical dimension, the leakage current is found to be reduced significantly for a fixed channel length of 10 nm. This results in a higher ION/IoFF ratio of ~ 1010 which in turn mitigates the drain induced barrier lowering (DIBL). The calculated results on various short channel effects (SCEs) indicate that the proposed model seems to have a greater drain current and a decreased subthreshold swing (SS) of 71 mV/Dec. The results of various figure of merits (FOMs) show that GaAs-based recessed gate DG-JLMOSFETs are extremely viable for the advancement of the upcoming nano-technology.